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Scalar Feedback Nodes in Loop-Based Designs in Optimized FPGA VIs

Last Modified: August 9, 2019

To take advantage of loop unrolling the compiler performs, avoid loop feedback patterns when possible.

If you have a feedback pattern in your For Loop, as demonstrated in the following image, you might not benefit from the advantages of loop unrolling because the compiler must wait for all loop iterations to complete before providing new inputs.

The one use case when you should use a feedback loop pattern is when you initialize an array shift register, which allows the compiler to optimize array initialization and eliminate iteration dependency.

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