Requests a region to write to a Host to Target FIFO and returns an external data value reference to this region. Use this node to automatically begin DMA data transfer between the FPGA target and the host computer without using Start DMA FIFO.
Select the FIFO you want to use from the FIFO menu on the Item tab.
Error conditions that occur before this node runs.
The node responds to this input according to standard error behavior.
Standard Error Behavior
Many nodes provide an error in input and an error out output so that the node can respond to and communicate errors that occur while code is running. The value of error in specifies whether an error occurred before the node runs. Most nodes respond to values of error in in a standard, predictable way.
Default: No error
Reference to an FPGA VI.
Reference to the array of elements the device driver allocates.
You must delete this external data value reference before the driver can read new data from the specified portion of the buffer.
The number of elements in the host memory buffer that are available to write.
Error information.
The node produces this output according to standard error behavior.
Standard Error Behavior
Many nodes provide an error in input and an error out output so that the node can respond to and communicate errors that occur while code is running. The value of error in specifies whether an error occurred before the node runs. Most nodes respond to values of error in in a standard, predictable way.
Where This Node Can Run:
Desktop OS: Windows
FPGA: Not supported
Web Server: Not supported in VIs that run in a web application