Writes to DRAM memory available on the FPGA target.
Reference to a DRAM memory item.
The location to write data in memory on the FPGA target. The valid address range depends on the requested number of elements you specify when creating the input memory item. For example, if you specify a requested number of elements of 65536, the valid address range is 0–65535. If address exceeds the address range, the data will not be written to memory.
The data to write to the DRAM memory on the FPGA target.
Reference to a DRAM memory item.
Where This Node Can Run:
Desktop OS: none
FPGA: All devices
Web Server: Not supported in VIs that run in a web application