# High Throughput Math Nodes (Clock-Driven Logic)

Achieve high throughput rates when performing fixed-point math and analysis.

Accumulates or decrements the values of x. The node has a signed mode and unsigned mode.
Implements an adder-subtractor that operates on bit patterns.
Represents a DSP48E slice on a supported FPGA target. You can use the this function on Xilinx Virtex-5, Virtex-6, and Virtex-7 FPGA targets.
Computes the sum of the inputs.
Computes the quotient of two numbers.
Computes the value of e raised to a specified power.
Computes the arctangent of one value divided by another value ( y/ x). The arctangent is in pi radians, which use fewer FPGA resources than radians. To convert this value into radians, divide the result by pi.
Computes the product of two specified values (x and y).
Computes the base e natural logarithm of a specified input value.
Converts polar coordinates to rectangular coordinates. You must specify the phase of the polar coordinates in pi radians, which use fewer FPGA resources than radians. To convert a radian value to pi radians, multiply the value by pi.
Computes 1/ x.
Converts rectangular coordinates to polar coordinates. This node returns the phase of the polar coordinates in pi radians, which use fewer FPGA resources than radians. To convert the phase into radians, divide the value by pi.
Computes both the sine and cosine of a specified value ( x). You must specify x in pi radians, which use fewer FPGA resources than radians. To convert a radian value to pi radians, multiply the value by pi.
Computes the square root of a specified value (x).
Computes the difference between two specified inputs (x and y).