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Provides support for NI data acquisition and signal conditioning devices.
Provides support for Ethernet, GPIB, serial, USB, and other types of instruments.
Provides support for NI GPIB controllers and NI embedded controllers with GPIB ports.
Reads elements of the DMA FIFO from the host-side of the DMA channel.
Reference to an FPGA VI.
Number of Elements determines the number of elements you read from the DMA FIFO.
Timeout (ms) specifies the minimum number of milliseconds the function waits before timing out.
Error conditions that occur before this node runs.
The node responds to this input according to standard error behavior.
Default: no error
Data returns the an array of elements read from the host memory part of the DMA FIFO.
Elements Remaining returns the number of elements remaining in the host-side of the DMA channel that are available for reading.
The node produces this output according to standard error behavior.
Installed By: LabVIEW Communications System Design Suite (introduced in 1.0)
Where This Node Can Run:
Desktop OS: Windows
FPGA: Not supported
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