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Before completing this task, verify that a memory item is the best data storage and transfer option for your application.

Use a memory item to transfer data between clock domains on an FPGA without respect to the sequence in which the data is written to memory.

What to Use

What to Do

Create the following diagram to transfer data between clock domains on an FPGA.

Customize the gray sections for your unique programming goals.

Define the data type and size of your locally scoped memory item using Create Memory. Configure the Memory Type to Block RAM and the Memory Mode to Read/Write. Implementing memory in block RAM allows you to access data across Clock-Driven Loops.
Specify the address within the memory item where you write data from this clock domain. You can specify addresses from controls or through values sent from data exchange nodes, or you can generate addresses programmatically within the clock domain. The code in this diagram cycles through three addresses each clock cycle so that Write Memory writes a value for each of the three cases in the Case Structure in this Clock-Driven Loop.

Process the data you write to memory during each loop iteration. To ensure valid data, do not read from and write to the same address during a single loop iteration.

In this diagram, the Case Structure performs Square, Negate, and Increment operations on the value received from input value.

Use the memory reference from Create Memory to specify the memory item that Write Memory writes data samples to. For example, in this diagram, Write Memory writes the result of the square operation to address 0, writes the result of the negate operation to address 1, and writes the result of the increment operation to address 2.
Specify the address you read from this clock-domain. The Case Selector, labeled operation, selects address 0 for Square, address 1 for Negate, and address 2 for Increment.
You must wire the output of Read Memory through a forward Feedback Node when reading from block RAM because a block RAM memory item requires at least one clock cycle to return a requested data sample.
Use the data from Read Memory to perform subsequent operations within this clock domain.


If the memory item returns unexpected data, verify that the input addresses for Read Memory and Write Memory are correct.


Search LabVIEW for the following installed examples: Memory