Read FIFO (Clock-Driven Logic)

Reads data from a FIFO. This node is a wrapper around the LabVIEW FPGA FIFO Read method and exposes handshaking signals to control when data is read from the FIFO.

Read FIFO » Read U8 FIFO

Reads data from an 8-bit FIFO.

Read FIFO » Read U16 FIFO

Reads data from a 16-bit FIFO.

Read FIFO » Read U32 FIFO

Reads data from a 32-bit FIFO.

Read FIFO » Read U64 FIFO

Reads data from a 64-bit FIFO.

Read FIFO » Read U128 FIFO

Reads data from a 128-bit FIFO.

Read FIFO » Read Boolean FIFO

Reads data from a Boolean FIFO.