Synchronizing Multiple Devices
- 更新日2025-11-11
- 6分で読める
For the digital waveform generators and analyzers, devices are synchronized through the following methods:
Sample Clock Phase Alignment
- PXI Devices
For PXI digital waveform generators and analyzers that use an internal clock source, the internal clock source can be phase aligned to the PXI_CLK10 signal on the backplane by selecting PXI_CLK10 as the Reference clock source. NI-TClk ensures that the Sample clock dividers on each PXI device are in phase for Sample clock alignment.
For PXI digital waveform generators and analyzers using an external clock source (CLK IN, STROBE, or PXI_STAR), ensure that the sample clocks are aligned when presented to the devices. If you are using PXI_STAR as the external clock source, the matched length traces on the PXI backplane assist in keeping the distributed sample clocks aligned. You can use a device like the PXI-5404 or PXI-6653 to distribute clocks on PXI_STAR.
- PXIe Devices
For PXIe digital waveform generator/analyzers using an internal clock source, the internal clock source can be phase aligned to the PXIe_CLK100 signal on the backplane by selecting PXIe_CLK100 as the Reference clock source. NI-TClk ensures that the Sample clock dividers on each PXIe device are in phase for sample clock alignment.
For PXIe digital waveform generators and analyzers using an external clock source (CLK IN or STROBE), ensure that the sample clocks are aligned when presented to the devices.
- PCI Devices
For PCI digital waveform generators and analyzers using an internal clock source, the internal clock source can be phase aligned to a 10 MHz reference signal on the RTSI 7 line of the RTSI connector. Configure the PCI device at one end of the RTSI cable to drive the onboard reference clock onto RTSI 7. Then configure all of the PCI devices to receive their reference clock from RTSI 7. NI-TClk ensures that the sample clock dividers on each device are in phase for sample clock alignment.
For PCI digital waveform generators and analyzers using an external clock source (CLK IN or STROBE), ensure that the sample clocks are aligned when presented to the devices.
Trigger Routing
The NI-TClk software uses the PXI trigger bus and RTSI bus lines to deterministically pass triggers between multiple digital waveform generator/analyzers. Refer to the multidevice NI-TClk examples for more information. Deterministic trigger routing ensures that all digital waveform generators and analyzers in the system start on the same sample.