VirtualBench VI Reference Help

SPI Query Bus Configuration (VI)

  • Updated2023-09-07
  • 4 minute(s) read

SPI Query Bus Configuration (VI)

Owning Palette: SPI Query
Installed With: NI-VirtualBench application development support

Indicates the current basic configuration of the SPI engine.

SPI Query Bus Configuration

cio.gif

Instrument Handle In specifies the session created by the Initialize VI.

cerrcodeclst.gif

error in describes error conditions that occur before this VI or function runs. The default is no error. If an error occurred before this VI or function runs, the VI or function passes the error in value to error out. If an error occurs while this VI or function runs, the VI or function runs normally and sets its own error status in error out. Use the Simple Error Handler or General Error Handler VIs to display the description of the error code. Use error in and error out to check errors and to specify execution order by wiring error out from one node to error in of the next node.

cbool.gif

status is TRUE (X) if an error occurred before this VI or function ran or FALSE (checkmark) to indicate a warning or that no error occurred before this VI or function ran. The default is FALSE.

ci32.gif

code is the error or warning code. The default is 0. If status is TRUE, code is a negative error code. If status is FALSE, code is 0 or a warning code.

cstr.gif

source identifies where an error occurred. The source string includes the name of the VI that produced the error, what inputs are in error, and how to eliminate the error.

iio.gif

Instrument Handle Out is a reference to the instrument.

idbl.gif

Clock Rate indicates the clock rate, in Hz.

ii32.gif

Clock Polarity indicates the idle state of the clock line for the SPI port.

Idle Low (0)

Clock is low in the idle state.

Idle High (1)

Clock is high in the idle state.

ii32.gif

Clock Phase indicates the positioning of the data bits relative to the clock edges for the SPI Port.

First Edge (0)

Data is centered on the first edge of the clock period.

Second edge (1)

Data is centered on the second edge of the clock period.

ii32.gif

Chip Select Polarity indicates the chip select polarity.

Idle Low (0)

Idle low.

Idle High (1)

Idle high.

ierrcodeclst.gif

error out contains error information. If error in indicates that an error occurred before this VI or function ran, error out contains the same error information. Otherwise, error out describes the error status that this VI or function produces. Right-click the error out indicator on the front panel and select Explain Error from the shortcut menu for more information about the error.

ibool.gif

status is TRUE (X) if an error occurred or FALSE (checkmark) to indicate a warning or that no error occurred.

ii32.gif

code is the error or warning code. If status is TRUE, code is a nonzero error code. If status is FALSE, code is 0 or a warning code.

istr.gif

source identifies where and why an error occurred. The source string includes the name of the VI that produced the error, what inputs are in error, and how to eliminate the error.

Log in to get a better experience