Device Specific:Vector Signal Transceiver:Signal Path:Absolute Delay
- Updated2025-10-14
- 1 minute(s) read
Specifies the sub-Sample Clock delay, in seconds, to apply to the I/Q waveform. Use this property to reduce the trigger jitter when synchronizing multiple devices with NI-TClk. This property can also help maintain synchronization repeatability by writing the absolute delay value of a previous measurement to the current session.
To set this property, the NI-RFSG device must be in the Configuration state.
Note If this property is set, NI-TClk cannot perform any sub-Sample Clock adjustment.
Note The resolution of this property is a function of the I/Q sample period at 15E(-6) times that sample period.
Supported Devices: PXIe-5820/5840/5841/5842
Valid Values: Plus or minus half of one Sample Clock period
Remarks
The following table lists the characteristics of this property.
| Short Name | Absolute Delay |
| Data type | ![]() |
| Permissions | Read/Write |
| High-level VIs | N/A |
| Channel-based | No |
| Resettable | Yes |
