Specifies the clock source for driving the PXI 10 MHz backplane Reference Clock.

Syntax

NIRFSG_ATTR_PXI_CHASSIS_CLK10_SOURCE

Numeric Value

Data Type

Access

Applies To

1150004

ViString

Read/Write

N/A

Remarks


This attribute is configurable if the PXI-5610 upconverter module is installed in only Slot 2 of a PXI chassis. To set this attribute, the NI-RFSG device must be in the Configuration state.

Only certain combinations of this attribute and the NIRFSG_ATTR_REF_CLOCK_SOURCE attribute are valid, as shown in the following table.

NIRFSG_ATTR_PXI_CHASSIS_CLK10_SOURCESetting

NIRFSG_ATTR_REF_CLOCK_SOURCE Setting

NIRFSG_VAL_NONE_STR,NIRFSG_VAL_ONBOARD_CLOCK_STR

NIRFSG_VAL_ONBOARD_CLOCK_STR

NIRFSG_VAL_NONE_STR,NIRFSG_VAL_REF_IN_STR

NIRFSG_VAL_REF_IN_STR

NIRFSG_VAL_NONE_STR,NIRFSG_VAL_REF_IN_STR

NIRFSG_VAL_PXI_CLK_STR

Defined Values:

Name

Value

Description

NIRFSG_VAL_NONE_STR

None

Do not drive the PXI_CLK10 signal.

NIRFSG_VAL_ONBOARD_CLOCK_STR

OnboardClock

Uses the highly stable oven-controlled onboard Reference Clock to drive the PXI_CLK signal.

NIRFSG_VAL_REF_IN_STR

RefIn

Uses the clock present at the front panel REF IN connector to drive the PXI_CLK signal.

Default Value:NIRFSG_VAL_NONE_STR

Supported Devices: PXI-5610, PXI-5670/5671

Related Topics

Timing Configurations

System Reference Clock

High-Level Functions: