Clocking:Digitizer Sample Clock Timebase Source Property
- Updated2025-05-22
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Clocking:Digitizer Sample Clock Timebase Source Property
Short Name: Digitizer Sample Clock Timebase Source
Property of niRFSA
Specifies the source of the Sample Clock timebase, which is the timebase used to control waveform sampling.
Default Value: OnboardClock
Supported Devices: PXI-5661, PXIe-5663/5663E/5665/5667/5668
| OnboardClock ("OnboardClock") |
The digitizer uses its onboard clock as the Sample Clock timebase. |
| ClkIn ("ClkIn") |
The digitizer uses the signal present on the CLK IN connector as the Sample Clock timebase. |
| LORefClk ("LORefClk") |
The digitizer uses the signal generated on the 100 MHz REF OUT terminal on the PXIe-5653 as the Sample Clock timebase. This value is supported only for the PXIe-5665. |
| PXI_STAR ("PXI_STAR") |
The digitizer uses the signal present at the PXI star trigger line as the Sample Clock timebase. |
| DownconverterLO2Out ("DownconverterLO2Out") |
The digitizer uses the signal exported from the LO2 OUT terminal on the PXIe-5606 as the Sample Clock timebase. This value is supported only for the PXIe-5668. |
Remarks
The following table lists the characteristics of this property.
| Datatype |  |
| Permissions | Read/Write |
| High-level VIs | N/A |
| Channel-based | No |
| Resettable | Yes |