Functional Overview

The PXIe-8881 is a modular PC in a PXI Express 3U-size form factor. The following figure is a functional block diagram of the PXIe-8881. Following the diagram is a description of each logic block shown.

Figure 1. PXIe-8881 Block Diagram

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The PXIe-8881 consists of the following logic blocks on three circuit card assemblies (CCAs):

  • The processor is an Intel® Xeon® W available with different core count and base frequency.
  • The SO-DIMM block consists of four SO-DIMM sockets that can hold up to 64 GB of DDR4-2666 MHz PC4-21300 ECC memory.
  • The processor provides the PCI Express interface to the PXI Express backplane.
  • The Platform Controller Hub (PCH) provides the USB, PCI Express x1, and LPC interfaces that connect to the peripherals on the PXIe-8881.
  • The DisplayPort 1.2 block consists of a 1.2 compatible DisplayPort connector.
  • The USB block consists of four Hi-Speed USB 2.0 connectors and two SuperSpeed USB 3.2 Gen 1 connectors.
  • The Ethernet Port 0 block consists of an Intel® I219 Gigabit Ethernet Connection.
  • The Ethernet Port 1 block consists of an Intel® I210 Gigabit Ethernet Controller.
  • The UART block connects to one serial port.
  • The SMB Front Panel Trigger provides a routable connection of the PXI triggers to/from the SMB on the front panel.
  • The Watchdog block consists of a watchdog timer that can reset the controller or generate triggers.
  • The PXI Express Connectors connect the PXIe-8881 to the PXI Express/CompactPCI Express backplane.
  • The GPIB block contains the GPIB interface.
  • The Thunderbolt 3 block contains the Thunderbolt 3 interface and connects to two USB-C connectors.