The following diagram shows the front panel of the PXIe-5820.

Figure 2. PXIe-5820 Front Panel


Caution Apply external signals only while the PXIe-5820 is powered on. Applying external signals while the device is powered off may cause damage.
Table 7. Front Panel Icons
Icon Description
Refer to the user documentation for required maintenance measures to ensure user safety and/or preserve the specified EMC performance.
The signal pins of this product's input/output ports can be damaged if subjected to ESD. To prevent damage, employ industry-standard ESD prevention measures during installation, maintenance, and operation.
Table 8. General Connectors
Connector Description Connector Type
REF IN Input connector that allows for the use of an external 10 MHz Reference Clock. MMPX (f)
REF OUT Output connector that can export a 10 MHz Reference Clock. MMPX (f)
PFI 0 Programmable-function digital I/O (DIO) connector for use with triggers or events. MMPX (f)
DIO Multi-signal DIO connector that provides access to FPGA multi-gigabit transceivers (MGTs) and general purpose LVCMOS signals. Nano-Pitch I/O
Table 9. I/Q Connectors
Connector Description Connector Type
I/Q OUT I+ Output connector for I+ signals. MMPX (f)
I- Output connector for I- signals. MMPX (f)
Q+ Output connector for Q+ signals. MMPX (f)
Q- Output connector for Q- signals. MMPX (f)
I/Q IN I+ Input connector for I+ signals. MMPX (f)
I- Input connector for I- signals. MMPX (f)
Q+ Input connector for Q+ signals. MMPX (f)
Q- Input connector for Q- signals. MMPX (f)