Use the pinout to connect to terminals on the PXIe-5775.

Figure 1. PXIe-5775 Digital I/O Connector Pinout


Table 2. PXIe-5775 Digital I/O Connector Signal Descriptions
Signal Type Direction
MGT Tx± <0..3> Xilinx UltraScale GTH Output
MGT Rx± <0..3> Xilinx UltraScale GTH Input
DIO <0..7> Single-ended Bidirectional
5.0 V DC Output
GND Ground —
Notice The maximum input signal levels are valid only when the module is powered on. To avoid permanent damage to the PXIe-5775, do not apply a signal to the device when the module is powered down.
Notice Connections that exceed any of the maximum ratings of any connector on the PXIe-5775 can damage the device and the system. NI is not liable for any damage resulting from such connections.
Note MGTs are available only on devices with KU040 and KU060 FPGAs.