PXIe-5668 Timing Configurations
- Updated2023-02-20
- 3 minute(s) read
PXIe-5668 Timing Configurations
The timebases of the PXIe-5624 IF digitizer and the PXIe-5653 synthesizer/LO source module must be frequency-locked to a common reference clock. The following clock sources are available:
Configuring for Onboard Reference Clock Timing
The default configuration of the PXIe-5668 allows the PXIe-5653 to export a 4 GHz LO2 signal to the PXIe-5624 so that the PXIe-5624 and the PXIe-5653 devices are frequency-locked.
Complete the following steps to configure the PXIe-5668 to use the PXIe-5653 internal clock.
- Connect the LO2 OUT connector on the PXIe-5606 front panel to the CLK IN connector on the PXIe-5624 IF digitizer front panel.
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Set the Ref Clock Source property to OnboardClock or the NIRFSA_ATTR_REF_CLOCK_SOURCE attribute to NIRFSA_VAL_ONBOARD_CLOCK_STR.
Figure 2. PXIe-5668 Default Cable Configuration
Configuring for External Reference Clock Timing
Complete the following steps to lock to an external reference source.
- Connect the external signal to the PXIe-5653 REF IN connector.
- Connect the LO2 OUT terminal on the PXIe-5606 to the CLK IN connector on the PXIe-5624.
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Specify RefIn as the Reference Clock source using the niRFSA Configure Ref Clock VI or the niRFSA_ConfigureRefClock function.
NI-RFSA uses a default Reference Clock rate of 10 MHz. Use the niRFSA Configure Ref Clock VI or the niRFSA_ConfigureRefClock function to specify a different Reference Clock rate. You can specify any frequency from 5 MHz to 100 MHz, in increments of 1 MHz.
Configuring for PXI 10 MHz Backplane Clock Timing
NI recommends that you configure your system so the PXIe-5624 IF digitizer uses the source provided by the PXIe-5606 LO2 OUT front panel connector. You can also configure the PXIe-5668 to lock to the PXI 10 MHz backplane clock, but doing so results in worse phase noise.
Complete the following steps to configure the PXIe-5668 to use the PXI 10 MHz backplane clock.
- Lock the PXIe-5653 to the PXI backplane clock.
- Connect the PXIe-5606 LO2 OUT to the LO2 IN connector on the PXIe-5624.
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Set the Ref Clock Source property to PXI_Clk or the NIRFSA_ATTR_REF_CLOCK_SOURCE attribute to NIRFSA_VAL_PXI_CLK_STR.
The PXIe-5653 can lock to the PXI Express backplane Reference Clocks if the backplane Reference Clocks meet the frequency accuracy requirements of the PXIe-5653.Note The PXI Express backplane Reference Clock, when left free running, may not meet the accuracy requirements of the PXIe-5653. The PXIe-5653 requirements are more stringent than PXI Express backplane accuracy requirements because of the high-performance OCXO on the PXIe-5653. Locking to the PXI Express backplane Reference Clock requires that the PXI Express backplane Reference Clock be locked to another, more accurate external reference.