PXIe-5667 Timing Configurations

The timebases of the PXIe-5622 IF digitizer, the PXIe-5653 synthesizer/LO source module, and the PXIe-5694 IF conditioning module must be frequency-locked to a common Reference Clock. The following clock sources are available:

  • 100 MHz PXIe-5653 LO synthesizer/LO source onboard Reference Clock—The PXIe-5653 supplies this 100 MHz source through the REF OUT (100 MHz) connector. The 100 MHz source is the default configuration.
  • 10 MHz external Reference Clock—Connect the external clock signal, from your stable frequency reference, to the REF IN connector on the PXIe-5653.
  • 10 MHz PXI backplane clock—This 10 MHz Reference Clock signal is supplied on the PXI backplane.
  • Note With the PXIe-5694, you can use the PXI Express 100 MHz reference input (PXIe_CLK100) on the PXIe-5693/5694 PXI Express backplane directly as the Reference Clock for your application. The PXIe-5693 must use the PXIe_CLK100 reference input as the Reference Clock signal.

    Configuring Onboard Reference Clock Timing

    The default configuration of the PXIe-5667 allows the PXIe-5653 to export its internal 100 MHz reference so that the PXIe-5622, PXIe-5653, and PXIe-5694 modules are frequency-locked.

    Complete the following steps to configure the PXIe-5667 to use the PXIe-5653 internal clock.

    1. Connect the 100 MHz REF OUT connector on the PXIe-5653 front panel to the CLK IN connector on the PXIe-5622 IF digitizer front panel.
    2. Set the Ref Clock Source property to OnboardClock or the NIRFSA_ATTR_REF_CLOCK_SOURCE attribute to NIRFSA_VAL_ONBOARD_CLOCK_STR.

    Configuring External Reference Clock Timing

    Complete the following steps to lock to an external reference source.

    1. Connect the external signal to the PXIe-5653 REF IN connector.
    2. Connect the 100 MHz REF OUT terminal on the PXIe-5653 to the CLK IN connector on the PXIe-5622.
    3. Specify RefIn as the Reference Clock source using the niRFSA Configure Ref Clock VI or the niRFSA_ConfigureRefClock function.
      NI-RFSA uses a default Reference Clock rate of 10 MHz. Use the niRFSA Configure Ref Clock VI or the niRFSA_ConfigureRefClock function to specify a different Reference Clock rate if you do not want to use the default value. The PXIe-5653 accepts any frequency from 5 MHz to 100 MHz in 1 MHz steps on the REF IN terminal as the Reference Clock.

    Configuring PXI 10 MHz Backplane Clock Timing

    NI recommends that you configure your system so the PXIe-5622 IF digitizer uses the Reference Clock source provided by the PXIe-5653100 MHz REF OUT front panel connector and the PXIe-5694 IF conditioning module uses the Reference Clock provided by the PXIe-565310 MHz REF OUT front panel connector. You can also configure the PXIe-5667 to lock to the PXI 10 MHz backplane clock. The default configuration locks the PXIe-5653, PXIe-5622, and PXIe-5694 to the PXI 10 MHz reference.

    Complete the following step to configure the PXIe-5667 to use the PXI 10 MHz backplane clock.

    1. Ensure the device is setup using the default cable configuration.
    2. Set the Ref Clock Source property to PXI_Clk or the NIRFSA_ATTR_REF_CLOCK_SOURCE attribute to NIRFSA_VAL_PXI_CLK_STR.
      The PXIe-5653 can lock to the PXI Express backplane Reference Clocks if the backplane Reference Clocks meet the frequency accuracy requirements of the PXIe-5653.
      Note The PXI Express backplane Reference Clock, when left free running, may not meet the accuracy requirements of the PXIe-5653. The PXIe-5653 requirements are more stringent than PXI Express backplane accuracy requirements because of the high-performance OCXO on the PXIe-5653. Locking to the PXI Express backplane Reference Clock requires that the PXI Express backplane Reference Clock be locked to another, more accurate external reference.