External Reference Clock In (CLK IN, Front Panel Connector)

Input voltage range, when configured as a Reference Clock

200 mV_pk-pk to 4 V_pk-pk

Maximum input overload, when configured as a Reference Clock

5 V_pk-pk with |Peaks| ≤10 V

Impedance

50 Ω

Coupling

AC

Frequency range^[1]1 The PLL Reference Clock frequency must be accurate to ±25 ppm.

10 MHz