PCIe-6509 Digital Filtering

Enable the digital filter on the PCIe-6509 input lines to eliminate glitches on input data. You can use the digital filtering with change detection to reduce the number of changes to examine and process.

By default, digital filtering on the PCIe-6509 is disabled. Enable digital filtering on as many input lines as needed.

You can configure the digital input channels to pass through a digital filter and control the timing interval the filter uses. The filter blocks pulses that are shorter than half of the specified timing interval and passes pulses that are longer than the specified interval. Intermediate-length pulses—pulses longer than half of the interval but less than the interval—may or may not pass the filter.

Table 4. PCIe-6509 Digital Filtering
Filter Setting Pulse Width Guaranteed to Pass Filter Pulse Width Guaranteed to Block Filter
None Any None
Short 160 ns 80 ns
Medium 10.24 µs 5.12 µs
High 5.12 ms 2.56 ms

Internally, the digital filter uses a sample clock and a filter clock.

  • Sample Clock—The device samples the input signal on each rising edge of the sample clock, but recognizes a change in the input signal only if the input signal maintains its new state for at least two consecutive rising edges of the filter clock.
  • Filter Clock—The filter clock is generated by a counter and has a period equal to one half of the specified timing interval. You can program the filter clock to control how long a pulse must last to be recognized by the device.
  • Digital Filtering Example

    The following figure shows that the filtering applies to a rising (0 to 1) transition and a falling (1 to 0) transition. Depending on when the transition occurs, the filter may require up to two filter clocks, including one full filter interval, to pass a transition.

    Figure 3. Digital Filtering Example

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    • Periods A and B: The filter blocks glitches because the external signal does not remain steadily high from one rising edge of the filter clock to the next.
    • Period C: The filter passes the transition, because the external signal remains steadily high.