Reset DDS Counters on PXI_Trig

Reset DDS Counters on PXI_Trig

Data Type	Access	Applies to	Coercion	High-Level VIs
	R/W	N/A	None	None

Description

Specifies whether or not the DDS clock dividers should reset when the device receives an update pulse on the PXI_Trig line specified in the Reset Synchronization Clock PXI_Trig Line parameter. If TRUE, the DDS clock dividers reset on the rising edge of the update pulse.

Note   This property is supported only on signal-based devices. This property is unsupported on the PXIe-6674T.

Property Node Path

niSync»Synchronization Clock Properties»Reset DDS Counters on PXI_Trig