The NI 9852 is a 2-port, low-speed/fault-tolerant CAN Module

FPGA I/O Node

You can use an FPGA I/O Node for either CAN Input or CAN Output.

Terminals in Software

You can select the following terminals for this device.

Table 523. CAN Terminals
Terminal Description
CAN0 CAN Port 0
CAN1 CAN Port 1

I/O methods

This device supports the following I/O methods.

Table 524. I/O Methods
Method Description
Abort Transmit Abort a pending CAN frame transmission.
Reset Reset the CAN port to the same state as when the FPGA VI started running.
Start Start communication.
Stop Stop communication.
Wait on Comm State Change Wait for a change in the communication state of the CAN port (Comm State property).
Wait on Transceiver Wakeup Wait for the Transceiver Mode property to change from Sleep to Normal mode due to a remote wakeup (bus activity) or local wakeup.
Wait on Transmit Complete Wait for all frames written to CAN Output to complete transmission.

I/O Properties

Use the FPGA I/O Property Node to access the following properties with this device.

Table 525. I/O Properties
Property Description
Bit Timing Specifies the baud rate as values for the Bit Timing Registers (BTR0 and BTR1).
Comm State Describes the current communication state of the CAN controller.
Listen Only Controls listen-only mode for passive monitoring/logging.
Log Bus Errors Enables the logging of bus errors as frames that can be read using the CAN Input node.
Log Transceiver Faults Enables the logging of transceiver faults as frames that can be read using the CAN Input node.
LS/FT Termination Enables the setting of the low-speed/fault-tolerant transceiver termination to either 1 kiloohm (1.11 kΩ) or 5 kiloohm (4.99 kΩ).
Receive Error Counter Provides access to the CAN controller Receive Error Counter.
Self Reception Specifies whether to echo successfully transmitted CAN frames to be read using CAN Input.
Single Shot Transmit Specifies whether to retry failed CAN frame transmissions.
SJA1000 Filter Code Controls the SJA1000 Acceptance Code registers (ACR0 to ACR3).
SJA1000 Filter Mask Controls the SJA1000 Acceptance Mask registers (AMR0 to AMR3).
SJA1000 Filter Mode Controls the SJA1000 Acceptance Mode register.
Transceiver Mode Sets the mode for the CAN transceiver and the associated mode in the SJA1000 CAN controller.
Transmit Error Counter Provides access to the CAN controller Transmit Error Counter.

Module Properties

Use the FPGA I/O Property Node to access the following properties with this device.

Table 526. Module Properties
Property Description
Module ID Returns the module ID. Refer to C Series Module IDs for a list of modules and the associated IDs.
Serial Number Returns the unique serial number of the CAN module.
Vendor ID Returns the National Instruments vendor ID, 0x1093.

Single-Cycle Timed Loop

This device does not support the Single-Cycle Timed Loop.