Avoiding Timing Uncertainty with the NI 9375 (FPGA Interface)

To avoid introducing timing uncertainty into DI and DO Node calls, adhere to the following guidelines:

• Use a single I/O Node to access DI and DO operations to ensure proper sequencing.
• Do not perform the following operations concurrently:
  • DI Node call
  • DO Node call

For an example of the recommended way to use the DIO subsystems, refer to the NI 9375 Digital Port Input Output VI in labview\examples\CompactRIO\Module Specific\NI 9375\NI 9375 Digital Port Input Output\NI 9375 Digital Port Input Output.lvproj.