Gets or sets properties on an FPGA target in the Project Explorer window. The available properties depend on the FPGA target and some FPGA targets do not support any properties.

To select a property, click the Property section and select a property from the shortcut menu. To add additional properties, right-click the Property section and select Add Element from the shortcut menu. You also can expand or contract the node by dragging the upper or lower edge of the node with the Positioning tool. To specify whether this node sets or returns a property, right-click an element in the Property section of the node and select Change to Write or Change to Read from the shortcut menu.


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The FPGA Target Method Node is an FPGA I/O Method Node configured for the FPGA target in the project. You can configure this node for only the FPGA target that contains the VI on which the node is placed.

Support for use of the FPGA Target Property Node and specific properties inside and outside the single-cycle Timed Loop varies by target. Refer to the specific FPGA target hardware documentation for more information.

Error Handling Details

You can right-click the FPGA Target Property Node on the block diagram and select Show Error Terminals from the shortcut menu to add standard LabVIEW error in and error out parameters to the function. If an error occurs, you may receive incorrect data. Add error terminals to be sure the data you receive is valid. FPGA targets may report errors differently. Refer to the specific FPGA target hardware documentation for information about how specific FPGA targets report errors.

Note Adding error in and error out parameters increases the amount of space the function uses on the FPGA target. The error in and error out parameters also can cause slower execution on the FPGA target.