LabVIEW Electrical Power Toolkit API Reference

Table of Contents

FPGA Phasor Measurement for P Class VI

  • Updated2023-02-21
  • 8 minute(s) read

FPGA Phasor Measurement for P Class VI

Owning Palette: Synchrophasor VIs

Requires: Electrical Power Toolkit

Calculates the instantaneous magnitude, phase, and frequency values of the fundamental frequency component as defined in the P class of performance in IEEE Std C37.118.1-2011. This VI resamples even-time-spaced voltage and current signals into even-angle-spaced signals. The input signals must have a sample rate of 50 kHz. The output rate is 25 samples per cycle. You must manually select the polymorphic instance to use.

Related Information
Handshaking Protocol

Example

FPGA Phasor Measurement for P Class (50 Hz)

number of channels specifies the number of channels of the input data. The default is 1. This VI supports up to 16 channels.
signal in specifies the voltage signals or current signals whose sample rate must be 50 kHz. When number of channels is greater than 2, the multichannel signal in must be interleaved.
Note  Because the input data type is <±,24,1> fixed-point and different analog acquisition modules have different fixed-point data types, the raw data from the data acquisition module must be divisible by a certain number so that the full range of the divided result can be represented as <±,24,1> fixed-point numbers without overflow. For example, the data type of NI 9225 is <±,24,10>, which means the raw data must be divisible by 512. Alternatively, you can right-shift the data by 9 bits and then convert the data type to <±,24,1> fixed-point.
timestamp specifies the timestamp, in seconds, of each sample of the input signal. The timestamp is the number of seconds since the International Atomic Time (TAI) epoch of 00:00:00, January 1, 1970, UTC time. The timestamp is not adjusted for leap seconds.
reference channel index specifies the channel of the input data that this VI uses as a reference to detect the resampling time and frequency. The default is 0. This VI usually uses a voltage channel as the reference channel. reference channel index must be less than number of channels.
input valid? specifies whether the next data point has arrived for processing. The default is TRUE. Use a handshaking protocol to wire the output valid? output of an upstream node to this input to transfer data from the upstream node to this node.
ready for output? specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a handshaking protocol to wire the ready for input? output of a downstream node through a Feedback Node to this input of the current node.
Note  If this input is FALSE during a given cycle, the output valid? output returns FALSE during that cycle.
output data returns the instantaneous magnitude, phase, frequency, and timestamp values. The output rate is 25 samples per cycle.
magnitude returns the instantaneous magnitude, in RMS value, of the fundamental frequency at even-spaced angle intervals.
Note  If you scaled the input data from the data type of the analog input (AI) module to <±,24,1> fixed-point, you must scale the output back using the same scale factor.
phase returns the instantaneous phase, in pi radians, of the fundamental frequency at even-spaced angle intervals.
timestamp returns the timestamp, in seconds, of each sample of the output signal. The timestamp is the number of seconds since the International Atomic Time (TAI) epoch of 00:00:00, January 1, 1970, UTC time. The timestamp is not adjusted for leap seconds.
frequency returns the instantaneous frequency at even-spaced angle intervals.
output valid? returns TRUE when this node has computed a result that downstream nodes can use. Use a handshaking protocol to wire this output to the input valid? input of a downstream node to transfer data from the node to the downstream node.
error returns error information about the phasor measurement process.
ready for input? returns TRUE when this node is ready to accept new input data. Use a handshaking protocol to wire this output through a Feedback Node to the ready for output? input of an upstream node.
Note  If this output returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this node during the following cycle. LabVIEW discards this data even if the input valid? input is TRUE during the following cycle.

FPGA Phasor Measurement for P Class (60 Hz)

number of channels specifies the number of channels of the input data. The default is 1. This VI supports up to 16 channels.
signal in specifies the voltage signals or current signals whose sample rate must be 50 kHz. When number of channels is greater than 2, the multichannel signal in must be interleaved.
Note  Because the input data type is <±,24,1> fixed-point and different analog acquisition modules have different fixed-point data types, the raw data from the data acquisition module must be divisible by a certain number so that the full range of the divided result can be represented as <±,24,1> fixed-point numbers without overflow. For example, the data type of NI 9225 is <±,24,10>, which means the raw data must be divisible by 512. Alternatively, you can right-shift the data by 9 bits and then convert the data type to <±,24,1> fixed-point.
timestamp specifies the timestamp, in seconds, of each sample of the input signal. The timestamp is the number of seconds since the International Atomic Time (TAI) epoch of 00:00:00, January 1, 1970, UTC time. The timestamp is not adjusted for leap seconds.
reference channel index specifies the channel of the input data that this VI uses as a reference to detect the resampling time and frequency. The default is 0. This VI usually uses a voltage channel as the reference channel. reference channel index must be less than number of channels.
input valid? specifies whether the next data point has arrived for processing. The default is TRUE. Use a handshaking protocol to wire the output valid? output of an upstream node to this input to transfer data from the upstream node to this node.
ready for output? specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a handshaking protocol to wire the ready for input? output of a downstream node through a Feedback Node to this input of the current node.
Note  If this input is FALSE during a given cycle, the output valid? output returns FALSE during that cycle.
output data returns the instantaneous magnitude, phase, frequency, and timestamp values. The output rate is 25 samples per cycle.
magnitude returns the instantaneous magnitude, in RMS value, of the fundamental frequency at even-spaced angle intervals.
Note  If you scaled the input data from the data type of the analog input (AI) module to <±,24,1> fixed-point, you must scale the output back using the same scale factor.
phase returns the instantaneous phase, in pi radians, of the fundamental frequency at even-spaced angle intervals.
timestamp returns the timestamp, in seconds, of each sample of the output signal. The timestamp is the number of seconds since the International Atomic Time (TAI) epoch of 00:00:00, January 1, 1970, UTC time. The timestamp is not adjusted for leap seconds.
frequency returns the instantaneous frequency at even-spaced angle intervals.
output valid? returns TRUE when this node has computed a result that downstream nodes can use. Use a handshaking protocol to wire this output to the input valid? input of a downstream node to transfer data from the node to the downstream node.
error returns error information about the phasor measurement process.
ready for input? returns TRUE when this node is ready to accept new input data. Use a handshaking protocol to wire this output through a Feedback Node to the ready for output? input of an upstream node.
Note  If this output returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this node during the following cycle. LabVIEW discards this data even if the input valid? input is TRUE during the following cycle.

Example

Refer to the Synchrophasor Measurement.lvproj in the labview\examples\Electrical Power\Synchrophasor directory for an example of using the FPGA Phasor Measurement for P Class VI.

Log in to get a better experience