Generate Code from Fixed-Point Multirate Filters

After obtaining an appropriate fixed-point filter model, the resulting fixed-point filter can be implemented on target hardware.

The fixed-point integer coefficients can be exported from the filter and then used in a filter execution engine. A LabVIEW FPGA code can be generated and then used the LabVIEW FPGA Module to target and deploy the resulting FPGA code to an NI Reconfigurable I/O (RIO) target.

Exporting Fixed-Point Integer Coefficients

When using a filter execution engine for which you need only filter coefficients, you can export the fixed-point multirate filter coefficients to a text file using the DFD Save to Text File VI. You can save the multirate filter coefficients to a text file and load them to the execution target. The text file contains a section that provides all information about the fixed-point integer coefficients and corresponding quantizers.

Generating LabVIEW FPGA Code

Use the Start IP Generator dialog box or the DFD FXP MRate Code Generator VI to generate LabVIEW field-programmable gate array (FPGA) code from a multirate filter.

Note To generate LabVIEW FPGA code, the installation of the LabVIEW FPGA Module and NI-RIO driver software is required. To execute the FPGA code, an FPGA target on which code runs is needed. Refer to the NI web site for information about these products.

The Digital Filter Design Toolkit uses LabVIEW projects to manage the resulting LabVIEW FPGA code. The following figure shows an example project file that contains LabVIEW FPGA code:

Figure 21. Example Project with LabVIEW FPGA Code

In the previous figure, the filtername.lvproj file, where filtername denotes the name of the fixed-point filter, contains the following folder and VI in addition to the default items:

  • filtername Block—This folder contains the generated filter VI. You can apply the filter to another project by copying and pasting this folder into the target project file.
  • filtername_DataOut—This item defines the output FIFO channel from the filter block of a fixed-point multirate filter. If you want to return the filtered signal directly to a host computer, you can modify the property of this file by completing the following steps:
    1. Right-click filtername_DataOut.
    2. Choose Properties from the shortcut menu.
    3. Choose Target to Host-DMA from the Type menu.
    4. Click OK.
  • filtername_DataIn—This item defines the input FIFO channel to the filter block of a fixed-point multirate filter. The fixed-point multirate filter uses the FIFO to communicate with other sections of the FPGA code, such as the FPGA I/O Node.
  • filtername_Filter.vi—This VI is the top-level VI of the generated LabVIEW FPGA code. To use the LabVIEW FPGA code, drag and drop this VI to the block diagram of the calling VI.
    Note The LabVIEW FPGA code you generate with the LabVIEW Digital Filter Design Toolkit supports only the fixed-point data type.

    • The way the LabVIEW FPGA code is used is different from the way a general LabVIEW VI is used. The following figure shows an example of a block diagram that uses LabVIEW FPGA code generated from the filtername_Filter VI.

    Figure 22. Example Block Diagram with LabVIEW FPGA Code Generated from the filtername_Filter VI

    In the previous figure, the filtername_Filter VI is not connected to any other items on the block diagram. However, this VI actually communicates with the items in the loop structures by processing the input signal from the filtername_DataIn FIFO and returning the output signal to the filtername_DataOut FIFO.

    You can generate LabVIEW FPGA code from a fixed-point single-stage multirate filter by using the Start IP Generator dialog box or the DFD FXP MRate Code Generator VI.

    You can generate LabVIEW FPGA code from a fixed-point multistage multirate filter by using the Start IP Generator dialog box or the DFD FXP NStage MRate Code Generator VI.

    You also can generate LabVIEW FPGA code from a fixed-point moving average filter by using the Start IP Generator dialog box or the DFD FXP Moving Average Code Generator VI.

    Postprocessing Filtered Signals

    After you deploy fixed-point filter coefficients to the target hardware, you can postprocess the filtered signal using the DFD FXP MRate Postprocessing VI.