The following block diagram illustrates PXIe-5641R AD 9857 DAC operation.

Refer to Programming for additional details on using the analog output section.

Digital to Analog Converter (DAC) Operating Modes (LabVIEW FPGA only)

The AD 9857 DAC has three operating modes:

  • Quadrature modulation mode (default)
  • Single-tone mode
  • Interpolating DAC mode

In quadrature modulation mode and in interpolating DAC mode, the PDCLK/Frequency Update (FUD) pin is an output from the AD 9857 DAC and functions as the parallel I/Q clock (PDCLK). In single-tone mode, the PXIe-5641R does not support the PDCLK/FUD pin configured as an input. An alternative to updating the frequency when the DAC has been configured for single-tone mode is changing the active profile. There are four possible profiles (set of frequency/phase registers), one of which is the active profile at any given time.

Using these DAC operating modes is not supported if you are using the NI-5640R instrument driver. To use this feature, you must write custom FPGA code.