IF Transceivers

NI PXIe-5641R Serial Interface Port

  • Updated2023-02-21
  • 1 minute(s) read

The information in the following section is intended for advanced users who are developing custom I/O driver VIs using the LabVIEW FPGA Module.

The DAC internal registers are accessed through a serial interface port. The serial port can be configured to have a two-wire interface (Clock and Data In/Out) or a three-wire interface (Clock, Data In, and Data Out). By default, the two-wire interface is selected; however, the NI PXIe-5641R requires the DAC to be configured as a three-wire interface before any registers are read. Refer to the examples for an illustration of how to configure a three-wire interface.

Caution  Failure to initially configure the DAC as a three-wire interface may result in incorrect behavior.

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