DIGITAL I/O

You can connect to the 12 general purpose digital lines on the PXIe-5624 through the DIGITAL I/O port using a supported cable and accessory.

DIGITAL I/O Signals

The DIGITAL I/O signals are connected to the FPGA through 3.3 V LVTTL buffers. These buffers allow for direction control, and isolation to protect the FPGA from overvoltage conditions. Direction is controlled independently for each channel through the LabVIEW FPGA I/O Method Node. For I/O levels and input and output impedances, refer to the PXIe-5624 Specifications.

DIGITAL I/O Lines

The digital lines are protected against overvoltage conditions. The device provides this protection through a combination of diode clamps to the +3.3 V and GND lines and a positive temperature coefficient resistor for impedance matching.
1378

Note The interface from the DIGITAL I/O LVTTL buffer to and from the FPGA is bidirectional. In the previous figure, DIR N represents the line direction. To guarantee that this line is not double-driven by both the FPGA and the buffer at the same time, the FPGA implements a direction control latency. This latency is a fixed delay between enabling the FPGA I/O buffer and setting the direction of the DIGITAL I/O. For more information on direction control latency, refer to the PXIe-5624 Specifications.

DIGITAL I/O Cables and Accessories

NI offers several cables and accessories that are compatible with the DIO connector.

Note These cables and accessories use a custom pinout that matches the PXIe-5624 DIO connector and maintains the 50 Ω transmission line environment. The use of other HDMI cables is not recommended.
Category Part Number Description
DIGITAL I/O Cable 152629-01, 152629-02 NI SHH19-H19-AUX shielded single-ended cable, 1 m or 2 m
DIGITAL I/O Accessory 782444-01 NI SCB-19 shielded I/O connector block