Use the Multirecord Acquisition instrument design library to acquire a series of waveforms that are aligned with various triggering conditions. The FPGA uses triggering conditions to determine when to start and stop acquiring each waveform. Each acquired waveform is stored in DRAM on the device in a region of memory called a record. Your application can retrieve those records from DRAM for further processing and analysis. You can perform this custom processing on the FPGA or host. Each data sample of a record is 32 bits wide. For devices that receive two samples per cycle, you can configure this instrument design library to acquire two samples per cycle.

This instrument design library is particularly useful when you need to capture a finite amount of data that is correlated with external events. For example, you can use this instrument design library in RF applications to capture multiple bursts of RF data and align those acquisitions to the start of each burst signal. Each RF burst might be stored in a single record. However, this is one specific example, and there are many other kinds of applications in which you can use this library.

In general, records are denoted by the assertion of a Reference Trigger. After the FPGA starts acquiring a record, the FPGA continues acquiring data into that record until the Reference Trigger asserts. After the Reference Trigger asserts, the FPGA acquires the specified number of post-trigger samples into that record before marking the record as complete and advancing to the next record. This behavior allows you to capture a specified number of samples both before and after the assertion of the Reference Trigger.

This library supports the following types of triggers:

  • Start Trigger—Starts the acquisition of the first record. This trigger is only valid for the first record.
  • Reference Trigger—Identifies a point of interest in the stream of acquired data samples. The FPGA uses this trigger to help decide when to stop acquiring a record. After the Reference Trigger asserts, the FPGA begins counting samples. After the FPGA acquires the specified number of post-trigger samples, the FPGA stops acquiring data into that record. The trigger is only evaluated when a record acquisition is in progress.
  • Advance Trigger—Starts the acquisition of additional records after the first record. The FPGA evaluates this trigger only after a record is done being acquired.

You can also use this instrument design library to store one or more 64-bit timestamps that are correlated with each record. For example, you could store the time when the Reference Trigger asserts for each record. This technique can be useful if your application needs to track when each record was acquired.

This instrument design library includes host VIs and FPGA VIs. The following figure is a high-level block diagram of the LabVIEW FPGA design of the Multirecord Acquisition library.

The FPGA writes sample data into this instrument design library from the Sample Clock domain. You can retrieve the acquired records from memory and transfer them to the host through the Fetch DMA FIFO VI. You can insert custom FPGA processing code either before samples are written to memory or after you retrieve records from memory. Where you decide to perform the processing generally depends on the nature of the signal processing algorithm.

Refer to the LabVIEW context help for the Multirecord Acquisition LabVIEW VIs for more detailed information about the library interface.