Pulser Topology
- Updated2025-10-31
- 2 minute(s) read
The pulser topology highlights bus bars, input connectors, and a block diagram, detailing key components for system integration and operation.
- Output bus bars
- Pulse/load bus bars
- Input power connector
- Input charge connector
- Input bias connector
Pulser Block Diagram
| Input Connector | Description |
|---|---|
| System Power | Input power |
| Charge Supply | Charge |
| Bias Supply | Bias |
| AUX | Interlock |
| USB | Controller |
| Cap Sense | Measurement point for the source voltage for the pulse |
RM-16061 Interlock Connection
The RM-16061 responds to an interlock signal that you can use to enable or disable outputs from the RM-16061. Pin 5 and Pin 1 of the AUX connector control this interlock input. When you short these pins, outputs from the pulser are enabled. System-level interlocks control this circuit and automatically disable pulser outputs unless the right conditions are met. Refer to Closing Interlocks for more information about system-level interlocks.
Related Information
- Closing Interlocks
The ETX-1630x includes an interlock system to prevent devices from outputting hazardous voltage except under controlled conditions.