NIRFSG_ATTR_PXI_CHASSIS_CLK10_SOURCE
- Updated2025-02-03
- 1 minute(s) read
NIRFSG_ATTR_PXI_CHASSIS_CLK10_SOURCE
| Numeric Value | Data type |
Access | Coercion | High Level Functions |
|---|---|---|---|---|
| 1150004 | ViString | R/W | None | niRFSG_ConfigurePXIChassisClk10 |
Description
Specifies the clock source for driving the PXI 10 MHz backplane Reference Clock. This attribute is configurable if the PXI-5610 upconverter module is installed in only Slot 2 of a PXI chassis. To set this attribute, the NI-RFSG device must be in the Configuration state.
Only certain combinations of this attribute and the NIRFSG_ATTR_REF_CLOCK_SOURCE attribute are valid, as shown in the following table.
| NIRFSG_ATTR_PXI_CHASSIS_CLK10_SOURCE Setting | NIRFSG_ATTR_REF_CLOCK_SOURCE Setting |
|---|---|
| NIRFSG_VAL_NONE_STR, NIRFSG_VAL_ONBOARD_CLK_STR | NIRFSG_VAL_ONBOARD_CLK_STR |
| NIRFSG_VAL_NONE_STR, NIRFSG_VAL_REF_IN_STR | NIRFSG_VAL_REF_IN_STR |
| NIRFSG_VAL_NONE_STR, NIRFSG_VAL_REF_IN_STR | NIRFSG_VAL_PXI_CLK_STR |
Defined Values:
| Value | Description |
|---|---|
| NIRFSG_VAL_NONE_STR | Do not drive the PXI_CLK10 signal. |
| NIRFSG_VAL_ONBOARD_CLK_STR | Uses the highly stable oven-controlled onboard Reference Clock to drive the PXI_CLK signal. |
| NIRFSG_VAL_REF_IN_STR | Uses the clock present at the front panel REF IN connector to drive the PXI_CLK signal. |
Default Value: NIRFSG_VAL_NONE_STR
Supported Devices: PXI-5610, PXI-5670/5671
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