Clock Routing

The following figure shows the clock routing circuitry of the cRIO-905x.

Figure 7. Clock Routing Circuitry of the cRIO-905x
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Note When switching between programming modes, you may notice the terms timebase and clock used interchangeably. This is due to the DAQ ASIC and the RIO FPGA using different terminology for timing and clock mechanisms. The documentation will use the term based on the programming mode discussed.