In semiconductor manufacturing, once the packing processing is completed, the chips will go through the final test where they are tested under various conditions of electrical signals and temperatures. A test socket is popularly used in this step to connect the DUT and test instruments, such as Source Measurement Units (SMU).
Ideally the socket will provide perfect electrical connection and operates reliably during its full life cycle. However, the socket may not provide normal connectivity all the time. The intermittent connection may cause extra measurement error and false product failure. Furthermore, the SMU may unexpectedly source more than the expected voltage or current under some scenarios and damage the DUT or SMU itself if connectivity is broken.
This document presents the common pitfalls of IC sockets and the best practices of using NI SMUs to test the chip in socket.
To test the semiconductor chip, there must be a physical connection with a clean electrical signal path established between the DUT and Automatic Test Equipment (ATE). A typical test socket, shown in figure 1, is a custom-designed electro-mechanical interface that delivers extremely clean electrical signal paths to connect the chip to the test equipment.
Figure 1. Typical IC Socket.
The socket body or cartridge is a customized piece of metal and plastic with precision cut cavities. Spring pins are inserted into the hole cavities to provide an electrical path with mechanical compliance that will connect the chips to the test system.
Because of the nature of this connection, the constant insertion and removal of devices in the socket will deteriorate over time and compromise the connection which is critical to the overall integrity of the test. The damage occurs when devices are inserted and removed from the socket, which causes metallic residue to buildup on the test socket contacts from small particles of the chip lead plating. These particles are transferred and get embedded on the surface of the socket pin. Over time, these particles become resistive and eventually degrade the connection between the socket pin and the DUT lead.
Another factor is the wear and tear of the plating on the test socket contacts themselves. This wearing out of the mechanism happens due to the extreme hardness of the plating on some DUT leads. Repetitive insertions and removal of the DUT will erode the spring pin contact plating, requiring more and more downward pressure applied to the DUT to contact the test socket. Eventually, the connection will become intermittent or fail altogether.
In addition to connection deterioration, a mechanical failure of the spring pin could cause a connection not to be made as expected. The sequence shown in Figure 2 demonstrates a possible scenario of what could potentially happen if a spring were to get stuck in the downward position. The socket body starts in the open position with all springs uncompressed. The DUT is inserted into the socket body, the lid is closed, and the springs are pushed downward in contact with the DUT leads. On removal of the DUT from the socket body, the middle spring becomes stuck in the downward position while the other springs recoil back into their uncompressed state. Since the one spring is stuck in the downward position, there will likely be no contact between the DUT lead of the next DUT and the spring pin in the socket body, causing an open circuit due to package tolerance.
Figure 2. Effect of a damaged spring within IC Socket.
In normal operation with the SMU outputting a constant voltage with remote sense enabled, the SMU implements a closed control loop. The Sense (HI_Sense/LO_Sense) lines sense the voltage at DUT. The control loop then uses this measurement as a reference to adjust Force output to keep the DUT voltage fixed. For example, if we want to set the voltage at the DUT to be 1.0 V, the SMU will start generating 1.0 V. Considering the voltage drop across the lead wire, HI_Sense line will tell the SMU that the DUT voltage is 0.1 V lower than the expected 1.0 V. In this case, the control loop will adjust SMU HI_Force to be 1.1 V so that the DUT will see 1.0 V in the end.
Figure 3. The general SMU under normal operation. (Only HI_Sense is shown in this diagram)
When the remote sense line (HI_Sense) is open or disconnected from the force line (HI_Force) on the SMU, the control loop will be broken and will no longer be able to correctly adjust the output voltage at HI_Force. In this case, the remote sense line is left floating, but will likely trend towards 0 V due to internal leakage from SMU ground.
Let’s say that the SMU is configured to output 1.0 V to the DUT. The SMU will start generating 1.0 V at the HI_Force line. Because the HI_Sense line is disconnected from HI_Force, it will tell the control loop of the SMU that the DUT voltage is 0 V, although it is not. The control loop won’t know that the HI_Sense line is disconnected and will think that there is a 1.0 V voltage drop across the HI_Force line. To combat this, the control loop will try it’s best to crank up the output voltage on the HI_Force line by sourcing as much voltage as possible in attempt to output the exact requested voltage. In the end, the SMU will output more than expected voltage, although this is the expected operation of SMU. The sourced current to the DUT, however, should still be in within the specified current limit since the control loop is still closed. Depending on the breakdown mechanism of the DUT, the over-sourced voltage could cause the test fixture, DUT and even the SMU itself to be overstressed under this fault condition and cause damage.
Figure 4. The general SMU when remote sense line is broken
To prevent this high voltage and current output from damaging the DUT, a high impedance resistor can be added between the HI_Force and HI_Sense lines and the LO_Force and LO_Sense lines of the SMU. This will provide open-sense protection by closing the control loop when using remote sense, even though the remote sense line is open. The sense line will sense the voltage across the Force lines through a high impedance open-sense protection resistor and the control loop will drive the SMU to output in the normal range.
Figure 5. The general SMU with a high impedance resistor between HI_Force and HI_Sense
Note: The NI 4135/6/7/8/9 and 4147 SMUs have built-in 1 MΩ open-sense protection resistors between HI_Force and HI_Sense and between LO_Force and LO_Sense, whereas the NI 4162 and 4163 SMUs do not. The use of the PXIe-416x Open-Sense Protection Accessory or the PXIe-416x Current and Open-Sense Protection Accessory is highly recommended for the 4162 and 4163 SMUs to add the open-sense protection resistor between HI_Force and HI_Sense and between LO_Force and LO_Sense to ensure that the lines are connected. Adding the resistor can impact remote sense accuracy. See the System Performance Considerations section below for how to determine application impact.
Figure 6. NI PXIe-416x Open-Sense Protection Accessory
As intermittent connection can happen at either socket pin, SMU force line may be disconnected from DUT while sense line is connected. Under current output mode, the SMU force may output more than expected voltage if the resistance between force and sense if high. Take for example, the 416x SMU is configured to sink 50mA current with a compliance voltage of 12V and there is a +12 V voltage source at the DUT seen by HI_Sense. When the HI_Force line is disconnected, the HI_Force line will rail to -25.5 V (maximum negative voltage the power plant can reach) in attempt to sink the -50 mA. This potential difference across the Force and Sense lines of the SMU surpasses the absolute maximum voltage rating of the SMU and can lead to damaging the circuitry of the SMU. Figure 8 shows the maximum voltage specifications for the PXIe-416x SMU.
Note: In NI-DC Power 2023 Q1 (23.0) and later, a Remote Sense OVP error will trigger if the voltage on the remote sense pin exceeds the 4162/4163 hardware limitations. Repeatedly triggering this error is not recommended and could damage your device.
Figure 7. NI 416x SMU with Open-Sense Protection Resistor equipped
Figure 8. Voltage Specifications of NI 4162 SMU.
Designing a connectivity program to catch if the HI_Force line disconnection has occurred can be implemented to detect failures before testing begins. One method of implementing this sort of test would be to configure the SMU to source a very small current to the DUT and measure the voltage. Since the internal circuitry of a typical IC chip contains protection diodes, we can source a small current (10 µA) to the input pin of the DUT and determine if a disconnect has occurred from the measured voltage. If the measured voltage rails or climbs to a voltage that is higher than the acceptable forward-biased voltage drop, then an open circuit/disconnect from HI_Force has occurred. This is a similar test implemented in the example for Opens and Shorts Testing Reference Design.
Figure 9. Sourcing a 10 µA current to the DUT with a 1 MΩ Open-Sense Protection Resistor added between HI_Sense and HI_Force to test for a disconnect of HI_Force.
When using the PXIe-416x Open-Sense Protection Accessory, the current flowing through HI_Force and HI_Sense to the DUT will add extra error in measurement. To combat this, you will need to add 200 µV to the accuracy specification for your respective module when using this accessory. When using the local sense configuration, you will also need to add 300 µV/mA to the accuracy specification for the load regulation to account for the 0.3 Ω contact resistance at the output connector pins of the connected PXIe-416x Open-Sense Protection Accessory.
Figure 10. NI 416x SMU with 1 MΩ resistor.
The value of the open-sense protection resistor between force and sense, the maximum lead resistance, and the maximum lead drop voltage all contribute to the remote sense voltage error. The following equations will show the derivation of the 200 µV added to the accuracy specification of the 416x SMU when using the PXIe-416x Open-Sense Protection Accessory:
When using the NI 413x SMUs, the accuracy error calculation due to the internal 1 MΩ open-sense protection resistor is shown in the third example of the NI PXIe-4139 Specifications document.
Figure 11. PXIe-4139 accuracy calculation example.
The error terms highlighted in green are contributed by the current flowing through the sense leads of the SMU. The error term highlighted in yellow is caused by 4139 internal circuit under remote sense mode.