For this application note, low-speed data transfers relate to data that is transferred at a rate less than 1 million samples per second (1 MS/s).
This is the most common handshaking protocol. Common applications include interfacing to parallel digital I/O peripherals such as BCD-compatible panel meters and communication/control of test equipment. All Lab/1200 Family, DIO-24/96, and MIO-16D boards use an 8255 or 82C55 PPI. In this application note 8255 and 82C55 PPIs will be referred to simply as 8255. Although the 6533 Family can emulate the 8255 protocol, the following discussion relates to the actual 8255 handshaking and not to the 8255 emulation mode of the 6533. Each 8255 chip contains three 8-bit ports (PA, PB, and PC). When the 8255 is configured for a handshaking operation, lines in Port C are used to control the data transfer operation.
8255 -- Mode 1, Strobed Input
Timing Specification for Mode 1 Input
There are two control lines used in the strobed input operation -- STB* and IBF. The STB* line is an input line that is controlled by the peripheral device that is handshaking with the 8255. The IBF is an output line that is controlled by the 8255.
A low signal in the STB* line causes the 8255 to load data into the input latch. The 8255 outputs a high signal on the IBF line to indicate that data has been loaded into the input latch. When the IBF lines goes back to low, the peripheral device can then place a low signal on the STB* line to load new data into the input latch of the 8255.
8255 -- Mode 1, Strobed Output
Timing Specification for Mode 1 Ouput
The two control lines that are used in strobed output operations are ACK* and OBF*. The ACK* line is an input controlled by the peripheral device that is handshaking with the 8255. The OBF* is an output line controlled by the 8255. The 8255 device places a low signal on the OBF* line to indicate that data has been written to the port. The peripheral device places a low signal on the ACK* line to indicate that the data written by the 8255 has been accepted. The peripheral device then sets the ACK* signal back to high when it is ready to accept new data.
8255 -- Mode 2, Bidirectional Bus
Timing Specification for Mode 2 Bidirectional
Only Port A on the 8255 PPI can be configured for a bidirectional mode. Two main lines of port C are used to control handshaking of port A -- ACK* and STB*.
When you want to configure the port as output, both ACK* and STB* are initially high. When the ACK* line goes low, data will be driven to Port A as long as the ACK* line is low. As soon as the ACK* line goes high again, Port A goes back to a high impedance mode, and thus the pattern you just wrote will no longer be present.
When you want to read from Port A when configured as input, make sure ACK* and STB* are held high. Port A is now configured as the input port, and the peripheral device can externally drive the lines of the port without damage. To latch in the data, the STB* lines needs to be placed low.
Handshaking More than One Port or More than One 8255 PPI
Digital Scanning Input Group Handshaking Connections
More than one digital port can be grouped together so that more digital data can be transferred at a time, such as 16-bit data transfers with two ports instead of 8-bit data transfers with one port. For 8255-based devices that perform handshaking, all the STB* lines must be connected together for digital input. Only the IBF* line of the last port should be connected to the peripheral device.
Digital Scanning Output Group Handshaking Connections
When performing digital output handshaking on more than one 8255 port, connect only the ACK* and OBF* handshaking signals of the last port.
While the maximum attainable transfer rate on the 8255 PPI is about 100 kwords/s (1 word = 8 bits), the constant sustainable rate may be significantly less. Since boards that use the 8255 PPI do not implement DMA transfers for the block I/O operations, the actual transfer rate depends on the programming language, CPU, and so on.