1. Reference Design
This white paper provides you with a complete hardware reference architecture kit, to begin completing your custom daughter card designs for National Instruments Single-Board RIO. By using the Multisim schematic capture and simulation environment, as well as the Ultiboard layout and routing software, you can leverage the attached design files to rapidly implement your own Single-Board RIO accessories and designs.
The design files are provided as a template, complete with many of the initial engineering details. This particular reference design is for the NI sbRIO-9601/9602 boards. The files contain schematic capture template, connectors, pin assignments, layout and additional engineering notations.
With this design reference you will find the following resources (in the attached 7971_sbrio_design_kit.zip file)
- Multisim File sbRIO-960x daughter card skeleton reference design.ms10
- Ultiboard File sbRIO-960x Daugter Board.ewprj
- Data File sbRIO-9XXX Connector Pinout Analog.pdf
- sbRIO-9XXX Connector Pinout Digital.pdf
- sbRIO-9XXX Connector Pinout General.pdf
This daughter card hardware reference architecture documentation is intended to be as accurate as possible, however it is always recommended to closely check all associated NI hardware documentation to verify specifics, such as correct pin assignments and to validate correct layout guidelines and pin spacing.
2. What is Single-Board RIO?
National Instruments Single-Board RIO products are designed for high-volume, embedded control and acquisition applications that require high performance and reliability. Engineers and embedded developers can use these real-time, single board computers to get embedded systems with I/O to market quickly. NI Single-Board RIO is powered by National Instruments LabVIEW FPGA and LabVIEW Real-Time technologies, giving engineers the ability to design, program, and customize the NI Single-Board RIO embedded system with easy-to-use graphical programming tools.
Each NI Single-Board RIO integrates an embedded real-time processor, a high-performance FPGA, and onboard analog and digital I/O onto a single board. All I/O is connected directly to the FPGA, providing low-level customization of timing and I/O signal processing. The FPGA is connected to the embedded real-time processor via a high-speed PCI bus. LabVIEW contains built-in data transfer mechanisms to pass data from the I/O to the FPGA and also from the FPGA to the embedded processor for real-time analysis, post-processing, data logging, or communication to a networked host computer.
Figure 1: Single-Board RIO Block Diagram
As noted in Figure 1 above, there are a number of different ports available on the SB-RIO to define custom I/O in order to better interface to real world measurements. Contained upon the Single-Board RIO are four, 50 pin digital connectors which in total are comprised of 10 digital ports.
With this white paper, we will discuss the ability of using National Instruments design tools, namely NI Multisim and NI Ultiboard, to define a circuit schematic, simulate performance, and then finally route and layout a complete PCB that will allow you to define a custom I/O module, such as a daughter card to work with the Single-Board RIO system.
- Learn more at ni.com/singleboard
3. Custom Design
Single-Board RIO is the newest design platform from National Instruments, to allow engineers to rapidly translate designs to the prototype and deployment stages. With LabVIEW and graphical design, an application can be quickly programmed for custom I/O acquisition and performance through embedded process development.
However, there is often the need to customize the behavior of the design platform. Custom hardware based deployments are sometimes necessary to provide the Single-Board RIO system with the appropriate level of signal conditioning and filtering. To complement the rapid nature of LabVIEW based design on Single-Board RIO, National Instruments provides board-level design tools to quickly define daughter cards, accessories and connectors.
With Multisim and Ultiboard, engineers have easy-to-use and flexible design tools to quickly prototype customized cards for their design platforms. To provide additional ease-of-use, National Instruments now provides resources, such as these to portray the best practices as well as actual reference designs to help showcase custom design for electronics engineers, domain experts, and others looking to leverage National Instruments tools for design.
4. What are NI Multisim and NI Ultiboard?
Multisim is an integrated capture and simulation environment, allowing you to easily design and simulate the behavior of board-level circuits.
You don't need to be a SPICE expert to design with Multisim. With an intuitive capture environment and an easy-to-use interface to industry-standard SPICE simulation, Multisim software can help you immediately begin designing and validating your PCBs. You can prevent costly prototype iterations and lost development time, as well as ensure quality with simulation and measurements earlier in your design flow. Multisim provides a large database of symbols and models for components from leading manufacturers such as Texas Instruments and Analog Devices.
Simulation facilitates the quick validation of design decision, prior to prototyping. Multisim provides easy access to normally complex simulation syntax through configured analysis interfaces and measurement instruments. This makes design validation quicker and easier.
The NI Ultiboard interface enables layout and routing of PCB designs. Integration with NI Multisim allows seamless transfer of schematics to layout. The customizable environment ensures accessibility to desired features for immediate productivity. Part placement and copper routes are optimized to either allow full control for precise definition of critical parts or automation for quick design completion. Ultiboard exports and produces industry standard format such as Gerber and DXF to take a final, optimized board to prototype and manufacture.
Figure 2: Multisim and Ultiboard Environments
5. Multisim Schematic Capture and Simulation
In this paper, we begin by considering some of the general design recommendations and themes to help to effectively using Multisim and Ultiboard to customize Single-Board RIO.
As previously stated, there are 10 individual connector ports upon the Single-Board RIO. It is through these connections, that one is able to create the custom design references to provide signal conditioning, and other I/O tasks.
When defining the schematic, there are two alternate manners in which to proceed with the design. First you can consider each of the 10 ports as individual design entities, or combine them into a single schematic symbol. Both provide advantages.
Ports and Connector
The file below is named sbRIO-960x daughter card skeleton reference design.ms10 and is available as a resource, both to help expand upon our discussion, as well as to be used as the basis of your future designs. These reference designs contain the various mating connectors to interface to the Single-Board RIO platform.
Figure 3 - Single-Board RIO Daughter Card Design in Multisim
In the schematic we have placed both an image of the Single-Board physical unit, as well as a drawn facsimile which helps to isolate some points of interest on the board. The four 50 pin connectors of the Single-Board RIO card (shown in both Figure 3 and 4) contain the 10 digital ports to which our daughter card must interface.
Figure 4 - SB-RIO Connectors and Ports
To help identify the 10 ports, both for this discussion, as well as for future designs, the color coded connector segments can be broken down into the following ports:
- Grey Port 4
- Brown Port 5
- Purple Port 6
- Green Port 7
- Blue Port 8
- Orange Port 9
- Light Blue Port 10
- Red Port 11
- White Port 12
- Black Port 13
It is the combination of these ports that create functional connectors. Referring to the ports listed above, our connectors are:
- Connector P3 = Port 13 + Port 12 + Port 11
- Connector P5 = Port 8 + Port 7 + Port 11
- Connector P4 = Port 4 + Port 5 + Port 6
- Connector P2 = Port 9 + Port 10 + Port 6
For greater understanding of the behavior of the pins on each port, the following tables provide specific analog pin-outs for each connector (P2, P3, P4 and P5) for the SB-RIO 960x:
Table 1a and 1b: Analog Pin Mappings of SB-RIO-960x (Connector P3 and P5)
Table 1c and 1d: Analog Pin Mappings of SB-RIO-960x (Connector P4 and P2)
With Multisim you are able to define multi-sheet designs which allows you to split a design across multiple schematics. This approach allows you to modularize the design into easily definable segments. With this effort, you are able to employ a ‘divide-and-conquer’ approach to the custom definition of designs (including daughter cards and accessories).
For a designs, such as a Single-Board RIO daughter card, the approach of defining circuitry which interfaces to each connector port (10 in total) separately, and defining the circuitry in isolation provides easier validation, and a more focussed design methodology.
On the left hand side of the Multisim environment (Figure 3) is the design toolbox, which lists the various projects, circuit files and hierarchical elements associated with a Multisim design. In this daughter card template, there are 10 individual circuit sheets. Each of these multiple circuit sheets are associated with the single board design, and represents the digital ports.
Figure 5 - Design Toolbox
By double-clicking on any of these individually named sheets we can examine the symbol associated with each port. By having each symbol representing a port on an individual sheet we can quickly begin defining individual circuitry that interfaces I/O to the Single-Board RIO port.
Below we will look at the symbols, and contents of each of the circuit sheets displayed in Figure 5:
- sbRIO-960X daughter card skeleton reference design#General
- sbRIO-960X daughter card skeleton reference design#Port4
- sbRIO-960X daughter card skeleton reference design#Port5
- sbRIO-960X daughter card skeleton reference design#Port6
- sbRIO-960X daughter card skeleton reference design#Port7
- sbRIO-960X daughter card skeleton reference design#Port8
- sbRIO-960X daughter card skeleton reference design#Port9
- sbRIO-960X daughter card skeleton reference design#Port10
- sbRIO-960X daughter card skeleton reference design#Port11
- sbRIO-960X daughter card skeleton reference design#Port12
- sbRIO-960X daughter card skeleton reference design#Port13
The #General sheet of the design contains conceptual drawings, and a schematic of the power connections for the design. This Multisim schematic sheet is provided to help provide context to the overall design.
Figure 6 - #General Schematic
In the following screen captures we explore the specific symbols for each port to interface to the Single-Board RIO platform, to complete a daughter card design.
Figure 7 - Port Symbols (Port 4 to 13)
With each of these symbols and the above analog pin mappings table, you can build appropriate circuit designs which interface to these pins. Each of these symbols maps to the appropriate Single-Board RIO connector footprint (or landpattern) for layout.
As discussed previously, a major advantage to this method is that we are able to divide and conquer our approach to design. For each individual “port circuit” we can within the confines of that particular need, define interfacing circuitry to signal condition any I/O. For designs which are stretching across teams, and tapping into the individual talents of a group of engineers, this approach means that each port can be separately tasked. It can also mean the ability to focus on each element of I/O individually.
Importantly it facilitates the introduction of simulation into this design. The circuitry can be defined, and the ease-of-use of Multisim can quickly be utilized to confirm the behavior of the design.
Designing with a Single Connector Block
With our previous design approach, we took the stance of separate design elements to facilitate the design by port. In the below schematic, we see the approach taken by an engineer to combine adjacent ports into a single connector. As we will soon discuss, although we remove some of the modular stance to circuit design, we do improve the speed at which the design can be handled.
Referring back to the connector/ports setup of the Single-Board RIO platform:
Figure 8 - Connectors P2, P3, P4 and P5
- Connector P3 = Port 13 + Port 12 + Port 11
- Connector P5 = Port 8 + Port 7 + Port 11
- Connector P4 = Port 4 + Port 5 + Port 6
- Connector P2 = Port 9 + Port 10 + Port 6
As opposed to figure 7, where we had individual ports symbolically defined, we can instead with this method define our interfacing circuitry to a complete connector (P2, P3, P4 or P5). An example of this connector is shown below.
Figure 9 - Complete Connector Symbol
Our previous approach provided a very detailed, port specific methodology to design. By using the complete connector symbol we are able to interface various signals to multiple ports in a single schematic and therefore rapidly design our accessory circuitry. We can still divide and conquer our circuit approach but now we can do so with multiple ports at once.
Ultimately simulation can still play a role with this design approach, however rather than simulating each individual port we are investigating each connector’s functionality. Again the ease-of-use of the Multisim simulation environment allows for quick use of simulation functionality to emulate and validate the behavior of designed circuitry prior to prototyping.
6. Ultiboard Layout, Routing and Mechanical Design
As a part of the National Instruments product family, the Ultiboard layout product provides flexibility for the quick prototyping of small to medium sized designs. As you will see in the accompanying design resources, board layouts with the various tedious elements of design (such as component, hole and mating connector placements) are available in Ultiboard, for the engineer to very quickly develop mating and daughter cards for Single Board RIO without having to worry about finding specifics about the mechanical nature of the board.
An example of this can be seen in a layout below, where the various mating connectors and power terminals have been already placed. These connectors map to the four 50 pin connectors that have previously been defined in the Multisim schematic. Multisim and Ultiboard are integrated, and as such the previous template file that we have discussed (sbRIO-960x daughter card skeleton reference design.ms10), annotates its specific I/O interfacing design elements to an Ultiboard layout.
This Ultiboard file is named sbRIO-960X Daughter Board.ewprj. This file is the template to which the various elements of the custom design will be connected for the purposes of custom I/O conditioning.
Figure 10 - Ultiboard Daughter Card Template
Below we can see how this layout appears with a 3D view of the template file in Ultiboard. This view visualizes the four 50 pin connectors of the daughter card.
Figure 11 - 3D View of Daughter Card in Ultiboard
Although the above figure shows the basic (skeleton) outline of the board, we can see what happens when we translate the various elements of a completed Multisim schematic (when the interface circuitry has been defined) to Ultiboard. Multisim and Ultiboard are integrated, such that once a schematic has been completed we can transfer these elements to Ultiboard, where they can be properly placed and routed.
If we look at the image below, we can see the mating board as defined in Ultiboard, with the various components and connectors placed.
Figure 12 - Daughter Card Layout
An advantageous functionality of Ultiboard is the ability to again render and explore a 3D view of a design. Below we can see the board that was designed and populated as a Single-Board RIO (sbRIO-964X) daughter card. By viewing the card in 3D prior to prototyping stages, the engineer has the ability to see how the mechanical nature of the design will work. For example the extent to which connectors and components protrude from the overall system.
Figure 13 - 3D View of Daughter Card Layout
7. Fabricating a Board Prototype
From Ultiboard it is relatively simple to export the various Gerber files (industry standard files used to fabricate PCBs) that need to be sent to a board manufacturer for production. In general (this can differ based upon a design), there are ultimately six important files that are required for manufacture:
- Copper Bottom
- Copper Top (with Board Outline)
- Silkscreen Top
- Solder Mask Bottom
- Solder Mask Top
The above is suitable for a simple 2 layer design. As you define inner copper layers, additional Gerber files must be generated.
For designs upon which through-hole components are placed, a drill file is required to explain the appropriate areas upon which the fabricator must make holes for components. For this an additional file to export is:
- Copper Top to Copper Bottom Drill File
There are a number of different board manufacturers who can quickly prototype designs. One of the most reputable fabricators is Sunstone Circuits. Sunstone provide very quick turn around on designs (in as little as 2 days). For designs of Single-Board RIO daughter cards, Sunstone can be provided the above Gerber and drill files for design fabrication.
With Multisim, Ultiboard and the various resources available on ni.com, you have the tools to architect custom designs such as daughter cards, C-Series modules, accessories and connectors to complete your National Instruments design platforms.
To learn more about board-level design with Multisim and Ultiboard:
- Circuit Design Technical Library
- Download a 30 Day Free Evaluation of Multisim and Ultiboard
- Learn more at ni.com/multisim