VME (VersaModule Eurocard)
The VMEbus was introduced by Motorola in 1981 and, in a short period of time, it became a dominant bus in the backplane industry. VME was originally designed as the I/O bus for the then newly introduced 68000 CPU from Motorola. It was deployed at a time when aggregate bandwidths exceeding 1 MB/s were newsworthy. Its competitors such as FutureBus and Multibus have faded into history. Since the early 1990s, VME has commanded almost half of the embedded computer boards market. (VME versus CompactPCI, VMEbus Systems-Feb 2003)
The VMEbus standard is governed by the VME Standards Organization (VSO). The 32-bit VMEbus offers a maximum bandwidth of up to 40 MB/s. The first significant change in the standards was the definition of a 64-bit version in 1995. The result was a doubling of the bandwidth to 80 MB/s. The first mechanical change was the introduction of the VME-64X specifications in 1998. The VSO defined connectors so that the same modules can be used in either legacy VMEbus or VME-64X backplanes, although a VME-64X board on a legacy VMEbus backplane loses some I/O functionality. Further extensions to VME signaling, 2eVME and 2eSST, have been standardized but have not been widely accepted.
VXI (VME bus eXtension for Instrumentation) was launched in 1988 and combines VME with the timing, triggering, and synchronization features needed for instrumentation applications. The VXI specification was developed to address the Military ATE (MATE) goal of moving from discrete rack-and-stack instrumentation to a more modular card-based measurement system, which resulted in physically smaller systems. Being based on VME, VXI offers much faster transfer rates than the 1 MB/s rate of the eight-bit GPIB found in rack-and-stack instruments. The tremendous popularity of GPIB also made it attractive as a model for device communication and instrument control protocols. The VXIbus specification adds the standards necessary to combine the VMEbus with GPIB to create a new, modular instrument platform that can meet the needs of future applications.
PXI (PCI eXtensions for Instrumentation)
PXI is a rugged PC-based platform for the measurement and automation of systems. PXI combines PCI electrical-bus features with the rugged, modular, Eurocard packaging of CompactPCI, and then adds specialized synchronization buses and key software features. PXI is both a high-performance and low-cost deployment platform for measurement and automation systems. These systems serve applications such as manufacturing test, military and aerospace, machine monitoring, automotive, and industrial test. Developed in 1997 and launched in 1998, PXI was introduced as an open industry standard to meet the increasing demands of complex instrumentation systems. Today, PXI is governed by the PXI Systems Alliance (PXISA), a group of more than 70 companies chartered to promote the PXI standard, ensure interoperability, and maintain the PXI specification. For more information on the PXISA, including the PXI specification, refer to the PXISA Web site at www.pxisa.org.
PXI uses the two most widely implemented buses, PCI and PCI Express, which are governed by the PCISIG. PXI, which is the fastest-growing test and measurement standard since GPIB, meets the demands of modular instrumentation with more than 70 vendors in the PXI Systems Alliance, more than 1,200 products, and a projected 25 percent annual growth rate through 2011 (Frost & Sullivan, 2005).
PXI Express technology is the latest addition to the PXI platform. The PXI Express specification integrates PCI Express signaling into the PXI standard, which increases backplane bandwidth from 132 MB/s in PXI (at 32 bits/33 MHz) to 6 GB/s, a 45 times improvement. It also enhances PXI timing and synchronization features by incorporating a 100 MHz differential reference clock and differential triggers. The PXI Express specification adds these features to PXI while maintaining complete software and hardware backward compatibility.
2. VME and PXI Comparison
Bus Bandwidth and Latency Considerations
Two parameters that are key to performance in a measurement system are bandwidth and latency. Bandwidth is a measure of the rate at which data is sent across a bus, typically in megabytes per second, and is directly related to measurement throughput. Latency measures the delay in transmission of data across a bus and affects the time to first measurement or change of parameter on a device.
Off-the-shelf 32-bit VME can theoretically sustain 40 MB/s. The VSO has defined a high-bandwidth protocol called 2eSST (2 edge Synchronous Source Transfer) that can support unlimited bandwidth when moving data in one direction (write). The unlimited bandwidth stems from the fact that VME is an asynchronous bus and this data rate is limited only by the hardware capabilities. However, DIN41612 connectors do not sustain bandwidths much beyond 1 GB/s and the issues with clocking parallel buses at these speeds are the main reason why the industry is moving toward serial buses such as PCI Express, USB, Serial ATA, and 1394. In addition, the total bandwidth in a VME system is shared between the devices. For example, a single device has access to the entire bandwidth of 40 MB/s in a 32-bit VME, but two devices have only 20 MB/s each.
Modular instruments require a high-bandwidth, low-latency bus to connect instrument modules to the shared processor for performing user-defined measurements. PXI meets these needs with bandwidth of up to 2 GB/s for each slot and up to 6 GB/s for the backplane. Take a modular RF acquisition system for example. PXI can stream two channels of 100 MS/s, 16-bit IF data directly to a processor for computation. Another key property of PXI is that each device gets its own dedicated bandwidth. Each PXI Express device has a dedicated bandwidth of up to 2 GB/s and the second device has its own dedicated 2 GB/s due to the nature of the point-to point interconnect of PCI Express. In addition to the high bandwidth and low latency that PCI Express offers, engineers can leverage peer-to-peer communications (communication between two endpoints bypassing the root complex or chipset), which reduces the system bus utilization and thus increases the overall backplane efficiency.
Modules per Chassis
VME is an asynchronous bus, and the limiting factor on the number of modules per chassis is essentially a signal integrity discussion. However, the number of modules in a single chassis is a function of the backplane and how well the signals can propagate through it. The physical constraints of a rack-mounted card cage limit the maximum number of modules in a VME system to 21.
PXI is a synchronous bus. To ensure proper timing and synchronization capabilities, PXI limits the load a module can drive. This leads to an upper limit on the number of modules on a single backplane driven by a single bridge. However, with multiple bridges, PXI can house up to 21 peripheral modules. The advantage of using multiple bridges is that devices in the same bus segment can send data to each other without impacting the bandwidth in the other bus segments. In addition, with PXI, engineers can choose from both 3U and 6U PXI modules and chassis based on their application needs.
Latency (point-to-point communications) and bandwidth are important performance parameters for real-time operation. As shown in Figure 3, PXI has the industry-best bandwidth and latency specification compared to other buses. Along with these parameters, interrupt latency, which is the time taken to service an asynchronous event, is a key performance parameter of real-time systems.
There are seven (Interrupt Request) IRQ lines on the VMEbus that support several possible interrupting devices. Each of these interrupting devices has a vector number that the system designer assigns. This vector number is unique for each interrupting device, which eliminates the chance of conflicts between these devices. The downside of this setup is that the system engineer is responsible for system configuration, resource assignment, and conflict avoidance. As a result ,VME developers have to maintain thorough documentation of the process to make sure the same nomenclature is followed by other developers working with the same system.
For PXI, there are only four IRQ lines that may be connected to up to 32 devices. A PXI system assigns the IRQ numbers during the standard PCI plug-and-play initialization process. The plug-and-play procedure is a three step process that involves the basic I/O system:
Determining which resources each device needs
Assigning resources including IRQs to avoid conflict
Creating a table that is passed to the OS to describe how the devices were configured
The limited number of interrupts can create a situation where a system with a large number of devices has to poll each device that is sharing the interrupt to determine which device requires attention. This can affect real-time performance.
However, with the advent of PCI 2.2 and PCI Express, engineers can offset this effect by using Message Signaled Interrupts (MSIs). Instead of a device signaling a shared interrupt vector via a pin as in PCI, the device can signal a unique vector via a write transaction to a system address. The plug-and-play OS configures each MSI-capable device with a system MSI-receiving address to write to (unique per MSI device) and allocates one to 32 unique "vectors" (the message data) per device. Then, the vector data written to the MSI-receiving address is handed off to the device driver. An advantage of the MSI system is that data can be pushed along with the MSI event, which decreases response time in real-time applications.
VME was designed as a platform that fully supports multiprocessing – a built-in feature that all controllers (computer boards) support. In VME, hardware implements arbitration and the software overhead is nil. The Bus Request (BR) lines run across the backplane and the Bus Grant (BG) lines are daisy chained. When a controller gets the bus, it can immediately start working with any other module on the bus and access any address in the VME address space. Because all addressing is predefined, the application software knows the addresses for all the different modules that the controller may need to access. This results in no software overhead.
PXI controllers handle addressing and interrupt assignments in a system. Other peripheral modules may become masters or slaves depending on the system configuration. When a master needs to communicate with another master or slave, it must arbitrate with the system controller to get the information. This adds some overhead compared to the VME architecture. But with the advent of multicore PXI controllers such as dual-core, quad-core, peer-to-peer communications (PCI Express), and PXI FPGA modules, the overhead for handling such information has decreased significantly. Currently there are dual-core PXI controllers for Windows and real-time systems.
In addition to multicore processors, field-programmable gate array (FPGA)-based technologies make it redundant to have independent multiple controllers in a system. With NI LabVIEW FPGA Module software and reconfigurable hardware, engineers can implement all processing using the onboard FPGA. They can change the personality of the hardware based on their application needs using LabVIEW software to implement all the necessary processing onboard.
Timing and Synchronization
Many applications require timing and synchronization capabilities that cannot be achieved directly over VMEbus. PXI timing and synchronization modules use the trigger bus, star trigger, and system reference clock features of PXI to implement advanced multidevice synchronization. Through shared timing and synchronization, engineers can vastly improve measurement accuracy and correctly synchronize multiple devices in high-channel-count applications.
PXI backplane features include the following:
100 MHz differential system reference clock
10 MHz reference clock signal
Differential star trigger
Star trigger bus with matched-length trigger traces to minimize intermodule delay and skew
Trigger bus to send and receive high-speed timing and triggering signals
Differential signals for multichassis synchronization
Because PXI is a PC-based platform, it delivers high-precision instrumentation, synchronization, and timing features at an affordable price. The low cost of PC components is only the beginning of the savings engineers can gain from using PXI. With PXI, they can take advantage of the same OS and application software such as Microsoft Excel and Word in their offices and on the production floor. Implementing a PXI real-time system using the LabVIEW Real-Time Module is similar to that of a Windows PXI system. The familiarity of the software eliminates training costs and the need to retrain personnel every time an engineer implements a new system. Because the foundation of PXI is PC technology, engineers benefit from low component costs, familiar software, and system reuse.
3. Hybrid Multiplatform Systems
With existing investments in VME, some developers may not be able to switch to a newer platform like PXI. Rather, with hybrid multiplatform systems, these developers can extend the life of their systems, maximize the investment in their existing equipment, and still take advantage of newer technologies. Hybrid systems combine components from multiple platforms, such as VME, VXI, PXI, GPIB, USB, and Ethernet, into one system. By using hybrid systems, engineers can integrate components into their existing systems as needed without a complete redesign. The key to creating these hybrid systems is designing the system with a layered architecture that helps to streamline the upgrade and maintenance process.
By designing hybrid multiplatform systems with the five-layer architecture shown in Figure 4, developers can clearly separate hardware from software. This eases legacy replacements and upgrades by requiring only minor changes in specific layers versus a redesign of the system to incorporate new components. The architecture starts from the bottom with the device I/O layer, which contains the individual instruments used. Next, the computing layer includes the embedded and remote controllers used to control instruments and interconnect different buses. Above sits the measurement and control services layer with the hardware and instrument drivers that bridge the hardware to the software. The fourth layer, the application layer, is composed of individual programs such as a digital multimeter measurement or a power spectrum. The architecture ends with the system management layer that provides a framework to call the test programs.
With the hybrid system architecture, developers can integrate instruments from different buses into the device I/O layer to create the system that best fits their needs. For instance, engineers can integrate their VME systems and specialized or custom instruments with the latest technology for high-performance, low-cost instruments. To interconnect the various buses in the computing layer, developers can choose from a broad range of controllers. Controller considerations, such as the ability to support instrument performance needs and the availability of peripherals for interconnection, affect the ability to expand and scale the system. Table 3 shows some of the connectivity options for interconnecting buses. For example, engineers can interconnect a VME system to a PXI system using a VME PXI MXI-2.
Hybrid multiplatform systems help engineers maximize their investments in VME equipment and take advantage of newer technologies such as PXI. By using the hybrid five-layer architecture, developers create systems that are scalable and streamlined for maintenance and upgrades. Hybrid systems provide VME developers a way to extend the lifetime of their systems and introduce newer technologies.
With continuous innovations in PXI such as multicore controllers, peer-to-peer communications (PCI Express), high- bandwidth/low-latency backplanes, MSIs, and onboard FPGAs, PXI is in a position to surpass the requirements of even the most challenging VME-based applications. In addition, hybrid multiplatform systems reduce the practical pain points in moving from one platform to another. With PXI forecasted to grow at 25.1 percent CAGR by Frost & Sullivan for the next several years, this may be the optimal time to upgrade the VME systems with PXI.
Dick Somes, VME versus CompactPCI-Who Cares? (VMEbus Systems) February 2003
What Is PXI? National Instruments
Udi Levin, VME versus CompactPCI-Choosing the Right Backplane Bus (VMEbus Systems) February 2003
Mark W. Morris, Choices: The modular instrument dilemma (VMEbus Systems) April 2005
Hybrid Systems-Integrating Your Multivendor, Multiplatform Test Equipment. National Instruments
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