Advanced Compiler in LabVIEW Communications

Publish Date: Dec 08, 2014 | 1 Ratings | 5.00 out of 5 | Print


In the race to define the next generation of communications standards, researchers must think outside the box and extend beyond the desktop simulation environment. Researchers have turned to software defined radio to prototype new algorithms and explore new designs with real-time, real-world signals.  However, most prototyping is far from rapid, and is typically expensive and time-consuming as high-level algorithms need to be translated to low-level languages like C, assembly, or HDL to run on SDR hardware. LabVIEW Communications resolves this fundamental challenge, as its advanced compiler enables algorithmic description languages to compile directly to FPGA, eliminating the tedious rewriting that hampers rapid prototyping.

The advanced compiler technology found in LabVIEW Communications allows designer to create innovative algorithms the same way they think. Researchers have the freedom to describe their algorithms using a static multirate diagram (MRD) and in graphical dataflow diagrams (G). These design languages are intuitive and particularly well suited for communications and signal processing algorithms. They enable researchers to visualize a signal chain, which makes it substantially easier to both understand data transformations and to partition a design on hardware. Additionally, the MRD is particularly valuable in enabling designers to tie together processes that run at different rates without the encumbrance of thinking through handshaking, buffering, and queuing data between processes.



Once the algorithm has been defined using a combination of MRD and G, researchers can explore different implementations by relying on the advanced compiler. By setting top-level design constraints, which entails defining a clock rate and a throughput, designers can get timing and resource estimates from the compiler. This liberates designers from having to manually dissect a design to understand the tradeoff between different implementations and the achievable performance. The advanced compiler does the heavy lifting of exploring the impact of unrolling loops, partitioning memory, modifying memory access schemes, selecting different FPGA resources/components, etc. The designer can then move forward with an implementation that best suits the design requirements based on the feedback from the compiler.

Researchers can also achieve considerable design reuse as the core algorithms are defined in higher level languages, and the implementation is derived from the design requirements that are imposed upon the algorithm. This allows for more rapid innovation as the algorithms can be easily moved to new designs and can be more easily iterated upon as they are represented in more understandable high-level languages.

This design flow enabled by LabVIEW Communications yields a much more rapid prototyping cycle. The algorithm design takes much less time as researchers have access to intuitive, high level languages well suited for communications systems. Similarly, the implementation and deployment to hardware is also quick and seamless as it simply a matter of defining design requirements on the algorithms. LabVIEW Communications is able to generate the design and deploy to both the processor and FPGA found on NI’s software defined radios based on the implementation chosen by the designer.

With LabVIEW Communications, design teams no longer need to rewrite algorithms in C or HDL to achieve an initial prototype, substantially accelerating the design cycle. In the race to define the next generation of communications standards, it’s critical to have tools that provide the fastest path from new designs to real-world signals. LabVIEW Communications enables the fastest path from algorithm to FPGA as designers can rely on the advanced compiler and design directives to deploy an initial prototype without requiring a design rewrite that is hardware specific. Stay ahead of the competition by using LabVIEW Communica tions and NI SDR to realize your next prototype.

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