1. High Clock and Data Rates
For precise, hardware-timed digital I/O, NI high-speed digital waveform generator/analyzers offer a range of clock speeds and data rates. The latest digital waveform generator/analyzers offer a maximum data rate of 400 Mb/s, a result of using the latest double-data rate (DDR) technology with a maximum clock rate of 200 MHz. These high data rates are essential for testing the latest integrated circuits, FPGAs, and digital communication devices.
At such high clock rates, precise, hardware-timed control of your digital generation and acquisition is essential to correctly analyze, test, and debug your devices. The generation and acquisition engine on these high-speed digital I/O devices allows you to have per cycle control of your generated and acquired data, a feature that is not available on static (software-timed) digital I/O devices.
2. Programmable Voltage Levels
A number of different voltage standards have emerged over the past several years to complement and improve upon the standard 5 V TTL/CMOS logic. To create a flexible digital system, you must often interface with multiple logic families. NI has a wide range of products to address both single-ended and differential logic families.
The NI 655x devices feature programmable voltage levels between -2.0 V and 5.5 V in 10 mV steps. This feature enables you to create a versatile and flexible system for almost any logic family. For example, you can create a system to validate a device under test (DUT) for different voltage ranges or characterize the upper and lower bounds of a specific DUT. Figure 1 illustrates one of the possible voltage ranges between -2.0 V and 5.5 V that you can select. The upper and lower limits that determine whether the NI 655x interprets the digital signal as a high or low, represented by VIH, VOH, VIL, and VOL, are each set programmatically.
Figure 1. Programmable Voltage Levels of the NI 655x
Differential data transmission has grown in popularity in recent years as a result of its high noise immunity, low power consumption, and high data rates. One particular standard, LVDS (low-voltage differential signaling), is receiving a lot of attention. The NI 656x devices provide a solution to interface directly to the low-voltage, differential signals of high-speed LVDS electronics.
Understanding LVDS for Digital Test Systems
NI 655x Digital Waveform Generator/Analyzers with Programmable Voltage Levels
Interfacing NI 655x Digital Waveform Generator/Analyzers to ECL Logic Families
3. Deep Onboard Memory
For applications that require fast, sustainable rates, deep onboard memory is necessary to acquire or generate large waveforms at these rates. The deep memory options available on NI products make it possible to store large, complex waveforms on the device itself and therefore bypass most dependencies on the computer bus. Waveforms stored onboard can easily be linked and looped together using the NI Script Editor, which is included with the driver software.
The 50 MHz and faster NI digital waveform generator/analyzers are based on the Synchronization and Memory Core (SMC) hardware architecture that offers deep onboard memory options. Unlike traditional instruments, these devices can store data and instructions in the same physical memory, which allows the digital waveform generator/analyzer to generate very complex waveforms. You can trade waveform memory space for instruction space and download up to 2 million waveforms or 3.3 million sequencing instructions.
These devices use a field programmable gate array (FPGA) to provide a common, flexible data generation and retrieval engine for the digital instruments. The FPGA allows you to seamlessly transition from generating or acquiring one waveform to another, without having to worry about missed or incorrect samples.
National Instruments Synchronization and Memory Core -- a Modern Architecture for Mixed-Signal Test
4. Multidevice Synchronization
If you need more digital I/O channels than are available on an individual device, you can create a high-channel count system without any external wiring. The NI digital waveform generator/analyzers based on the SMC architecture use a patent-pending method for sub-nanosecond synchronization of multiple devices, whether between numerous digital devices or a combination of digital devices, digitizers (oscilloscopes), and arbitrary waveform generators.
The goal of synchronization is to be able to generate and receive waveforms precisely among multiple instruments. Synchronization of National Instruments devices is implemented by sharing triggers and a reference clock between the devices. The National Instruments SMC-based devices can be synchronized at the subnanosecond level for superior accuracy.
For the NI 653x devices, you can also perform synchronized pattern I/O with a high number of I/O lines using two or more high-speed NI 653x digital I/O devices. PXI modules and chassis feature a built-in PXI trigger bus to accomplish accurate synchronization. For PCI and ISA devices, you can interconnect them using the Real-Time System Integration (RTSI) bus. In both cases, you can achieve synchronization without external wiring.
National Instruments T-Clock Technology for Timing and Synchronization of Modular Instruments
5. Automated Test Equipment (ATE) Features
Today’s digital testers are often required to do more than simply write or read a 1 or 0. For every clock cycle, you may need to configure the tester to drive stimulus data, acquire data, disable the output drivers, or compare the acquired response data with expected data. New test systems use six distinct channel states, shown in Table 1, to define a digital waveform and control the actions of the digital tester.
|Drive logic low to the DUT|
|Drive logic high to the DUT|
|Drive high impedance (tri-state)|
|Compare response data to logic high|
|Compare response data to logic low|
|Ignore the DUT output|
For digital stimulus response applications, the National Instruments NI 655x digital waveform generator/analyzers offer per-cycle, per-channel bidirectional control (per-cycle tristate) and real-time hardware comparison of the acquired response data. These devices can be used with communication buses, such as the I2C bus, that demand a bidirectional test system that can drive data in one clock cycle and acquire data in the next clock cycle. For other applications, the real-time hardware comparison feature makes bit error rate testing (BERT), pass/fail manufacturing tests, detailed failure analysis for Verification and Validation (V&V), and reverse probing for debugging easier to develop and faster to execute.
National Instruments High-Speed Digital ATE and Stimulus Response Features
High-Speed Digital Real-time Hardware Compare Example
6. Phase Shifting of Data (Data Delay)
For many test systems, being able to adjust for and measure certain timing parameters of a device under test is crucial. The 50 MHz and faster digital devices have a feature known as data delay, which allows you to phase shift the acquisition channels, generation channels, and the exported clock. Configuring data and clock positions allows you to use your NI digital waveform generator analyzer for many common applications including, among many others, measuring setup and hold times, measuring propagation delays, and maximizing the timing margins among high-speed data transfers.
Figure 2. Data Delay of Both Acquisition and Generation Signals
Figure 2 illustrates an example of data delay for the acquisition and generation channels relative to the clock. For each individual channel you can select whether to use the configured data delay. A separate data delay value can be configured for the acquisition channels, generation channels, and the exported clock. For example, you can delay your acquisition channels by 1/64 of your clock period, and delay your generation channels by only 1/256 of your clock period. The data delay is easily configured in software, allowing you to easily toggle between different settings to fully test your device.
7. Flexible Handshaking Modes
When creating an interface to other devices, you often need to establish a two-way communication between the receiver and transmitter. The handshaking I/O modes on NI digital products allow you to communicate with an external device using an exchange of signals to request and acknowledge each data transfer.
With the NI 653x, the handshaking I/O mode ensures you transfer data only when the NI 653x and the external device are ready by using Handshake Trigger and Ready for Transfer Event signals (previously known as REQ and ACK, respectively, in Traditional DAQ). The NI 653x supports several handshaking protocols, which include Burst Mode, 8255 Emulation, and configurable asynchronous handshaking in which you can control the various timing aspects of the transfer.
Burst protocol, the most common handshaking mode, is a synchronous, or clocked, protocol. In burst protocol, in addition to using the Ready for Transfer Event and Pause Trigger signals, a clock signal is shared between the NI 653x and the peripheral device.
For the SMC-based devices, handshaking can be accomplished using the Pause trigger. The Pause trigger indicates to the device that it should pause the acquisition or generation. When an external device can no longer send or receive data, it simply asserts (or deasserts) the Pause trigger to stop the generation or acquisition until it is ready to transfer data again.
NI Digital Waveform Editor
8. Interactive Digital Waveform Editor for Creating and Editing Waveforms
In order for any digital waveform generator to be useful, you must be able to create and edit your desired waveforms easily. The NI Digital Waveform Editor is an interactive software tool for creating and editing digital waveforms. The tool allows you to build waveforms easily with automatic fill patterns and to edit your waveforms interactively.
Figure 3. NI Digital Waveform Editor
You can import existing test patterns in ASCII or Value Change Dump (.VCD) formats from popular spreadsheet and digital simulation packages. Once imported, you can view the waveforms graphically and edit them for new devices or test conditions.
9. Easy-to-use Drivers for LabVIEW, LabWindows/CVI, and Measurement Studio (C/C++)
NI has expanded the support of the robust, easy-to-use NI-DAQmx driver software to include support for the NI PXI and PCI 653x digital I/O devices, along with multifunction, counter/timer, and signal conditioning devices. NI-DAQmx driver software includes express technology to help you easily and quickly develop a powerful application that interfaces directly to your hardware. For your existing applications, NI-DAQmx is still fully backward compatible with all of your applications developed using Traditional NI-DAQ.
Bundled with NI-DAQmx, the Measurement & Automation Explorer services software simplifies the configuration of your measurement hardware with device test panels, interactive measurements, and device simulation. The software tightly integrates the full functionality of your hardware with LabVIEW, LabWindowsTM/CVI, Measurement Studio, C/C++, and Visual Basic.
The SMC-based digital waveform generator/analyzers use the NI-HSDIO driver software to provide the ease-of-use benefits of NI-DAQmx with an optimized driver for high-performance digital applications. NI-HSDIO includes generation and acquisition Express VIs for LabVIEW to make programming as easy as filling in a few fields of an interactive window. The driver incorporates an intuitive API for powerful C/C++ programming. Also included with the driver is the NI Script Editor, which makes it easy to link and loop multiple waveforms together for a finite or continuous generation session.