1. Traditional DMMs
Traditional DMMs, which focus on resolution and precision but do not offer high-speed acquisition capability, have an inherent limitation in noise performance versus speed. For example, the Johnson noise of a resistor sets a theoretical limit, and semiconductor device technology sets other practical limitations. Therefore, traditional DMMs do not achieve the highest possible measurement performance. Specialized DMMs that yield both high resolution and speed are very expensive - around $8,000 - and are available only in full-rack configurations that consume significant system or bench space.
The traditional hardware platform, the general purpose interface bus (GPIB) - also known as IEEE 488, causes another DMM speed limitation. In use since the 1970s, GPIB is often considered a standard, despite trade-offs in speed, flexibility, and cost. Most traditional, stand-alone DMMs use GPIB, although newer models also offer Universal Serial Bus (USB) and Ethernet as options. Each of these interfaces communicates with the DMM by sending messages to the instrument and waiting for a response, and this process is inherently slower than the register-based access that PXI modular instrumentation employs.
Regardless of which interface the DMM uses, the basic speed and precision limitation in traditional DMMs continues to be the analog-to-digital converters (ADCs) that these products use. The following section discusses traditional ADC technology.
2. Traditional DMM ADC Technologies
In wide use since the 1950s, a common form of precision A/D conversion is the dual-slope ADC. This ADC is essentially a two-step process. First, an input voltage, representing the signal to be measured, is converted into a current and is applied to the input of an integrator through switch S1. When the integrator is connected to the input at the beginning of the integration cycle or aperture, the integrator ramps up until the end of the integration cycle or aperture. At this point, the input is disconnected from the integrator. Next, a precision, known reference current is connected to the integrator through switch S2, and the integrator ramps down until it crosses zero. During this time, a high-resolution counter measures the time needed for the integrator to ramp down from where it started. This measured time, relative to the integration time and reference, is proportional to the amplitude of the input signal. Refer to Figure 1 below:
Figure 1. Dual-Slope ADC Block Diagram
Even today, many high-resolution DMMs use the dual-slope ADC. It has the advantage of simplicity and precision, and with long integration times, resolution can be increased to theoretical limits. However, there are design limitations that ultimately affect product performance, as follow:
- Dielectric absorption of the integrator capacitor must be compensated, even with high-quality integrator capacitors, which can require complicated calibration procedures.
- The signal and the reference must be gated on and off, and this process can introduce charge injection into the input signal. Charge injection can cause input-dependent errors (nonlinearity) that are difficult to compensate for at very high resolutions (6 1/2 digits or more).
- The ramp-down time seriously degrades the speed of measurement. The faster the ramp down, the greater the errors introduced by comparator delays, charge injection, and the like.
Some topologies use a transconductance stage prior to the integrator to convert the voltage to a current and then use "current steering" networks to minimize charge injection. Unfortunately, this added stage introduces complexity and possible errors.
Despite these design limitations, a variety of DMMs, including the most common bench or field service tools and high-precision metrology-grade, high-resolution DMMs, use dual-slope ADCs. As with most integrating A/D techniques, dual-slope ADCs provide the advantage of fairly good noise rejection. Setting the integration period to a multiple of 1/PLC (power line frequency) causes the ADC to reject line frequency noise - a desirable result.
Many manufacturers overcome the dielectric absorption and speed problems inherent in dual-slope converters by using the charge-balance-with-ramp-down ADC. This technique is fundamentally similar to the dual-slope method but instead applies the reference signal in quantized increments during the integration cycle. This method is sometimes called "modulation". Each increment represents a fixed number of final counts. Refer to Figure 2, as follows:
Figure 2. Charge-Balance-with-Ramp-Down ADC Block Diagram
During this integration phase, represented in Figure 2 by taperture, S1 is turned on and Vx is applied through R1, starting the integrator ramping. Opposing current is applied at regular intervals through switches S2 and S3. This configuration "balances" the charge on C1. Measurement counts are generated each time S5 is connected to VR. In fact, for higher resolution measurements (longer integration times), most of the counts are generated during this taperture phase. At the end of the charge-balance phase, a precision reference current is applied to the integrator, as is done in the case of the dual-slope converter. The integrator is thus ramped down until it crosses zero. The measurement is calculated from the counts accumulated during the integration plus the weighted counts accumulated during the ramp down. Manufacturers use two or more ramp-down references, resulting in fast ramp downs to optimize speed and to achieve slower "final slopes" for precision.
Although the integrator capacitor dielectric absorption problems are greatly improved with the charge-balance-with-ramp-down ADC, it has performance benefits similar to the dual-slope ADC. In fact, some dual-slope converters use multiple ramp-down slopes. Speed is greatly improved, because the number of counts generated during the charge-balance phase reduces the significance of any ramp-down error, so ramp down can be much faster. However, there is still significant dead time if multiple measurements are made because of disarming and rearming the integrator.
This type of ADC, in commercial use since the 1970s, has evolved significantly. Early versions of this ADC used a modulator similar to that of a voltage-to-frequency converter. These ADCs suffered from linearity problems brought on by frequency-dependent parasitics and were thus limited in conversion speed. In the mid-1980s, the technique was refined to incorporate a "constant frequency" modulator. This method is still widely used today and dramatically improved both the ultimate performance and manufacturability of these ADCs.
Sigma-delta ADCs, or noise-shaping ADCs, have their historic roots in telecommunications. Today, the technique is largely used as the basis for commercially available off-the-shelf ADC building blocks produced by several manufacturers. Significant evolution has taken place in this arena over the last decade or so, and much research is still ongoing. Sigma-delta ADCs are commonly used to digitize signals in the following situations:
- The acquisition engine in some modular DMMs (PXI, PCI, and VXI)
- Dynamic signal analysis (DSA)
- Commercial and consumer audio and speech
- Physical parameters such as vibration, strain and temperature, where moderate-bandwidth digitizing is sufficient
Figure 3 shows a basic diagram of a sigma-delta ADCs:
Figure 3. Sigma-Delta ADC Block Diagram
The basic building blocks of a sigma-delta ADC are the integrator(s), 1-bit ADC and DAC (digital-to-analog converter), and digital filter. The noise shaping is done by the combination of the integrator stages and digital filter design. There are numerous techniques for implementing these blocks. Different philosophies exist regarding the optimum number of integrator stages, number of digital filter stages, and the like. However, the basic operational building blocks remain fundamentally the same. A modulator consisting of a charge-balancing feedback loop is similar to that described above. The 1-bit ADC, because of its inherent precision and monotonicity, leads the way to very good linearity.
There are many advantages to using commercially available sigma-delta ADCs, as follow:
- Fairly linear with good differential nonlinearity (DNL)
- Signal noise can be controlled very effectively
- Inherently self-sampling and tracking (no sample-and-hold circuitry required)
- Generally low in cost
However, there are some limitations to using off-the-shelf sigma-delta ADCs in high-resolution DMMs, as follow:
- Speed limitations, especially in scanning applications, due to pipeline delays through the digital filter
- Although generally linear and low noise, manufacturer specifications limit precision to 5 1/2 digits (19 bits)
- Modulation "tones" can alias into the passband, creating problems at high resolutions
- Limited control over speed-noise tradeoffs, acquisition time, and the like
3. NI PXI-4070 FlexDMM Technology
NI evaluated these and other ADC alternatives for the NI 4070 6 1/2-digit FlexDMM (PCI and PXI). However, no existing ADC provided the noise, linearity, speed, and flexibility required to achieve the goal of high-speed, high-precision measurements. With a growing demand for fast-isolated measurements, having a built-in high-speed digitizing is essential. To meet these demands, NI developed an ADC using a combination of off-the-shelf high-speed ADC technology and a custom-designed sigma-delta ADC, shown in Figure 4. This combination optimizes linearity and noise for 7-digit precision and stability and offers digitizer sampling rates of up to 1.8 MS/s.
Figure 4. FlexADC Converter
Figure 4 shows a simplified model of how the FlexADC operates. At low speeds, the circuit exploits the advantages of the sigma-delta converter. The feedback DAC is designed for extremely low noise and exceptional linearity. The lowpass filter provides the noise shaping necessary for good performance across all resolutions. No ramp down is necessary, because the ultra-high precision 1.8 MS/s modulator provides extremely high-resolution conversion without it. At high speeds, the 1.8 MS/s modulator combines with the fast-sampling ADC to provide continuous-sample digitizing. The DSP provides real-time sequencing, calibration, linearization, AC true-rms computing, and decimation, as well as the weighted noise filtering used for the DC functions.
The FlexADC has several advantages, as follow:
- The unique architecture of the FlexDMM offers a continuously variable reading rate from <5 S/s at 7 digits to 5 kS/s at 4 1/2 digits, as shown in Figure 4a
- The FlexADC can be operated as a digitizer with a sampling rate of up to 1.8 MS/s, as shown in Figure 4b
- Due to the custom sigma-delta modulator, noise shaping and digital filtering has been optimized for use in DMM and digitizer applications
- Unlike other ADC conversion techniques, it is not necessary to turn the input signal on and off; therefore, continuous contiguous signal acquisition is possible
- Direct AC voltage conversion and frequency response calibration are possible without the use of a conventional analog AC TRMS converter and analog "trimmers" for flatness correction
- Input signal noise can be dramatically reduced on all functions with appropriate noise-shaping algorithms (refer to the DC Noise Rejection section)
- Advanced host-based functions can be implemented with LabVIEW, once signals are digitized, leading to an almost endless list of signal characterization options (FFT, calculating impedances, AC crest factor, peak, AC average, and the like)
Table 1 compares all four of these ADC architectures:
Alternating current (AC) signals are typically characterized by rms amplitude, which is a measure of their total energy. Rms stands for root-mean-square; to compute the rms value of a waveform, you must take the square root of the mean value of the square of the signal level. Although most DMMs do this nonlinear signal processing in the analog domain, the FlexDMM uses an onboard digital signal processor (DSP) to compute the rms value from digitized samples of the AC waveform. The result is quiet, accurate, and fast-settling AC readings.
The rms algorithm used by the FlexDMM requires only four periods (cycles) of the waveform to obtain a quiet reading. For example, it requires a measurement aperture of 4 ms to accurately measure a 1 kHz sine wave. The advantage brought about by this technique extends to system performance. With traditional DMMs, it is necessary to wait for an analog TRMS converter to settle before a measurement can be made. With the FlexDMM, there is no TRMS converter to settle. The result is faster AC reading rates, and this advantage is realized in systems with switching, as Figure 5 shows:
Figure 5. FlexDMM AC Reading Rates
Virtual AC Coupling
The rms algorithm employed by the FlexDMM is largely insensitive to any DC component of the signal being measured. Thus, the AC coupling capacitor typically found on traditional DMMs that blocks the DC signal component is not always necessary using the FlexDMM. A coupling capacitor is available for situations where a very large DC offset must be blocked before digitization, but for applications without large DC components, such as AC power line and audio signals, the capacitor can be bypassed by using DC-coupled AC. No long time constant is associated with an input coupling capacitor, and so the AC settles very quickly. The importance of settling time is apparent in automated systems that scan through multiple devices under test (DUTs) or in multiple AC signal levels in a component such as a power supply.
The FlexDMM uses a digital filter to ensure AC accuracy for all frequencies up to the specified limits. This filter is factory calibrated for every AC range. Traditional precision DMMs use variable capacitors or DAC-driven RC feedback circuits to calibrate AC frequency response. The FlexDMM, because of the DSP-based algorithm, eliminates variable capacitors and other analog components, which could drift out of calibration. Eliminating these traditional "analog drift components" gives the FlexDMM exceptional temperature specifications and 2-year accuracies.
While the array of AC and high-speed capability available with the FlexDMM is impressive, no compromise was made in offering high-stability, metrology-class DC voltage and resistance functions. Several factors contribute to the FlexDMM achieving this performance:
- The availability and quality of miniature surface-mount high-performance, precision components has improved dramatically over the past 10 years
- Smaller, tightly laid out electronic packaging actually improves performance, especially thermal tracking between precision components
- The use of the FlexADC and DSP for AC voltage computation and frequency response calibration simplifies input signal conditioning into a common path, reducing components, complexity, and switching
- The lack of "Front-Rear" switch (common in box DMMs) simplifies the input layout, reduces crucial circuit signal path resistance and improves signal integrity
- The power supply consumes no space on the measurement module because it is built into the PXI chassis
Input Signal Conditioning
A major source of measurement error in most traditional DMMs is electromechanical relay switching. Contact-induced thermal voltage offsets can cause instability and drift. The FlexDMM eliminates all but one relay in the DC volts, AC volts, and resistance path. A special relay-contact configuration cancels the thermal errors in this single relay. This relay is switched only during self-calibration. All measurement-related switching for function and range changing is done with low-thermal-offset, highly reliable solid-state switching. Thus, electromechanical relay wear-out failures are all but eliminated. Figure 6 shows an overnight drift performance of the most sensitive range, the 100 mV range. Each division is 500 nV. For comparison, the same measurement made under identical conditions with a traditional 6 1/2-digit multimeter and a full-rack 8 1/2-digit multimeter is also shown in Figure 6:
Figure 6. FlexDMM 100 mV Range Stability with Shorted Input, Compared to a Traditional 6 1/2-Digit Multimeter and a Full-Rack 8 1/2-Digit Multimeter
Onboard Precision References
The FlexDMM employs some of the most stable onboard references available. As a voltage reference, the FlexDMM uses a well-known thermally stabilized reference that provides unmatched performance. This voltage reference is thermally shielded for optimum performance. The result is a maximum reference temperature coefficient of less than 0.3 ppm/ºC. Time stability of this device is on the order of 8 ppm/year. No other DMM in this price range offers this reference source and the accompanying stability. The FlexDMM offers a 2-year guarantee of accuracy.
Resistance functions are referenced to a single 10 k Ω highly stabilized metal-foil resistor originally designed for demanding aerospace applications. This component has a guaranteed temperature coefficient of less than 0.8 ppm/ºC and a time stability of less than 25 ppm/year.
Linearity is a measure of the "quality" of a DMM transfer function. It is important in conversion-component characterization applications to offer DNL and INL (integral nonlinearity) performance substantially better than that available in off-the-shelf ADCs. The Flex ADC is designed for excellent linearity, both DNL and INL. Linearity is also important because it determines the repeatability of the self-calibration function.
Figure 7 shows a typical NI 4070 linearity plot measured on the 10 V range from -10 to +10 V:
Traditional DMMs are calibrated at a particular temperature, and this calibration is characterized and specified over a limited temperature range, usually ±5 ºC (or even ±1 ºC in some cases). Thus, whenever the DMM is used outside of this temperature range, its accuracy specifications must be derated by a temperature coefficient, usually on the order of 10 % of the accuracy specification/ºC. So 10 ºC outside of this specified range, you may have twice the specified measurement error, which can be a serious concern when absolute accuracy is important.
Unfortunately, keeping the environmental temperature of a precision instrument within ±5 ºC can be challenging in a production environment, or in a test system composed of multiple instruments, sources, and the like. Instruments in a system are subject to temperature rise caused by inherent compromises in air circulation and other factors.
If the excursions in temperature exceed these limits and tight specifications are required, then recalibration is also required at the new temperature. Take, for example, the 10 VDC range on traditional DMMs. A DMM may have an accuracy of:
1-year accuracy: (35 ppm of reading + 5 ppm of range) for T = 23±5 ºC
In this specification, if you apply 5 V to the input, the error is:
35 ppm of 5 V + 5 ppm of 10 V = 225 µV, for the temperature range 18 to 28 ºC
This is the traditional method of specifying accuracy. If the ambient temperature is outside of the 18 to 28 C range, the user needs to "derate" the accuracy using the temperature coefficient (tempco). With the traditional method, the only way to achieve the specified accuracy outside of the 18 to 28 ºC range is to fully recalibrate the system at the desired temperature. Of course, this process is often impractical and expensive. In the example above, if the DMM ambient temperature is 50 ºC, perhaps due to stacking of many instruments in the rack with limited airflow, and the tempco is specified as:
tempco = (5 ppm of reading +1 ppm of range)/ºC, then the additional error is:
22 ºC x tempco = (120 ppm of reading + 22 ppm of range) or 1045 µV total uncertainty. This error at 50 ºC ambient temperature is nearly five times worse than the specified 1-year accuracy.
Assuring PPM-Level Precision
To eliminate errors caused by these effects, the FlexDMM incorporates a proprietary self-calibration function for DC volts, resistance, and digitizer mode. This function is significant for the following reasons:
- The self-calibration function corrects for all signal-path gain and offset errors within the DMM back to the precision, high-stability internal voltage reference previously described.
- Self-calibration accounts for all resistance current source, gain, and offset errors. In resistance mode, all errors are corrected back to the single internal 10 kΩ precision resistor.
- Self-calibration takes one minute and fully recalibrates all ranges of voltage, resistance, and digitizer functions. In traditional DMMs, more than 10 minutes are required to perform this function.
The result is a highly accurate, ultra-stable DMM at any operating temperature, well outside of the traditional 18 to 28 ºC, with the use of self-calibration. For the example above, the additional error introduced by temperature coefficient using self-calibration would be fully covered in the 90-day and 2-year specifications and would be:
(already accounted for in the specification)
This error represents an enormous improvement in accuracy over the full operating temperature range of the DMM. Figure 8 summarizes these results:
Traditional 6 1/2 (1-Year)
NI PXI-4070 (2-Year)
|Measurement within 18-28 ºC||
|Measurement at 50 ºC
|Measurement at 50 ºC
1045 µV (no self-cal available)
Using the FlexDMM with Self-Cal provides accuracy at 50 ºC that is eight times better than traditional methods.
|"Factory" Cal||Recalibrate time drift of
Corrects for AC flatness drift
|Every 2 years||To full specifications|
|Self-Cal||6 1/2-digit precision
Recalibrates Measurement path and ADC
For VDC, resistance, digitizer
|90 days or for temperature change <5 ºC||To specifications on VDC, resistance, and digitizer functions over FULL operating temperature range|
The FlexDMM has a full suite of resistance measurement features and offers both 2- and 4-wire resistance measurement capability. The 4-wire technique is used when long test cables and switching result in "test lead" resistance offsets that make measurements of low resistance difficult. However, there are situations when offset voltages introduce significant errors. For these situations, the FlexDMM offers offset-compensated resistance measurements, which are insensitive to offset voltages found in many resistance measurement applications, such as the following:
- Switching systems using uncompensated reed relays (uncompensated reed relays can have offset voltages greater than 10 µV caused by the Kovar lead material used at the device glass seal)
- In-circuit resistance measurements (for example, power supply conductors being measured for resistance, while the circuit under test has power applied)
- Measuring the source resistance of batteries, dynamic resistance of forward-biased diodes, and the like
In the first situation above, a test system is built with switching optimized for things other than resistance measurements. For example, reed relays are common in RF test systems because of their predictable impedance characteristics and high reliability. In such a system, it may be desirable also to measure resistances of units under test (UUTs), and the reed relays may already exist in the system.
In the second situation, an example would be measuring the resistance of a power supply bus wire with the power on (you should exercise great care when performing this type of test). With resistance in the range of 10 m, if there is 100 mA flowing through this resistance, the voltage drop is:
A DMM without offset compensation in the 100 Ω range would interpret this as 1 Ω, because the DMM will think that this voltage is being generated by its internal 1 mA current source passing through the wire being measured. With Offset-Compensated Ohms enabled on the FlexDMM, the 1 mV offset is distinguished and rejected, and the correct value of resistance is returned.
Figure 10. First Cycle with Current Source ON
Figure 11. Second Cycle with Current Source OFF
This measurement involves two cycles. The first cycle is measured with the current source on, and the second cycle is measured with the current source off. The net result is the difference between the two measurements. Because the offset voltage is present in both cycles, it is subtracted out and does not enter into the resistance calculation, as shown below:
DC Noise Rejection
DC Noise Rejection is an exclusive NI feature available for DC measurements on the FlexDMM. Each DC reading returned by the FlexDMM is actually the mathematical result of multiple high-speed samples. By adjusting the relative weighting of those samples, the sensitivity to different interfering frequencies can be adjusted. Three different weightings are available - normal, second-order, and high-order.
When Normal DC noise rejection is selected, all samples are weighted equally. This process emulates the behavior of most traditional DMMs, providing good rejection of frequencies at multiples of f0 (where f0 = 1/taperture , the aperture time selected for the measurement). Figure 11 illustrates normal weighting and the resulting noise rejection as a function of frequency. Note that good noise rejection is obtained only very near multiples of f0.
Figure 11. Normal DC Noise Rejection
Second-order DC noise rejection applies a triangular weighting to the measurement samples, as shown in Figure 12. Note that very good rejection is obtained near even multiples of f0, and that rejection increases more rapidly with frequency than with normal sample weighting. Also note that the response notches are wider than they are with normal weighting, resulting in less sensitivity to slight variations in noise frequency. You can use second-order DC noise rejection if you need better power-line noise rejection than you can get with normal DC noise rejection but if you cannot afford to sample slowly enough to take advantage of high-order noise rejection. For example, you could set the aperture to 33.333 ms for a 60 Hz power-line frequency.
Figure 13 illustrates high-order sample weighting and its resulting noise rejection as a function of frequency. Notice that noise rejection is good starting around 4 f0 and is excellent above 4.5 times f0. Using high-order rejection, there is almost no sensitivity to noise at any frequency above 4.6 times f0. A FlexDMM using high-order DC noise rejection with a 100 ms aperture (10 readings/s) can deliver full 6 1/2-digit accuracy at any frequency above 46 Hz with more than 1 V of interfering power-line noise on the 10 V range. This performance is equivalent to >110 dB normal-mode rejection, insensitive to variations in power line frequency.
Table 2 summarizes the differences between the three DC noise rejection settings, as follow:
|DC Noise Rejection Setting||Lowest Frequency for Noise Rejection||High-Frequency Noise Rejection|
|High-order||4/ taperture||Best >110 dB rejection|
Traditional DMMs use multiple shunts, switching, and the like to achieve dynamic range on the current function. The FlexDMM uses a remarkable high-power precision shunt resistor coupled with a high-gain, ultra low-noise, signal-conditioning amplifier. The result is an uninterrupted measurement path for testing currents drawn by electronic devices at full load and during device standby - offering a dynamic range from 1 A to 10 nA, with virtually no settling tails due to self-heating or thermals.
NI has developed a high-performance, single-slot 3U PXI and PCI FlexDMM based on its FlexADC technology. Many of the traditionally error-prone analog functions of conventional DMMs have been replaced by using a commercially available high-speed digitizer, DSP technology, and the power of the host computer. Self-calibration provides optimum accuracy over the full 0 to 55 ºC (PXI-4070) and 0 to 40 ºC (PCI-4070) operating temperature range with a 2-year calibration cycle. Coupled with highly stable built-in reference elements, the result is the world's fastest, most accurate modular PCI/PXI DMM, with uncompromised features and performance rivaling and exceeding that of most traditional DMMs.