Simultaneous Sampling Data Acquisition Architectures

Publish Date: Jul 30, 2010 | 47 Ratings | 4.02 out of 5 |  PDF

Overview

There are three specifications used as the primary selection criteria for simultaneous sampling data acquisition devices: speed, resolution, and number of channels. This holds true for a broad variety of devices, from an oscilloscope to a temperature logger. However, many architectures are used within data acquisition devices that can affect how you interpret these specifications with respect to your application. It is important to pay close attention because the analog input architecture used to achieve simultaneous sampling across multiple channels affects how often input channels can be sampled as well as the accuracy of the data acquisition device itself.

Table of Contents

  1. Simultaneous Sampling Architecture – Simultaneous Sample and Hold (SSH)
  2. Simultaneous Sampling Architecture - Multi-ADC
  3. Software Makes All Timed Hardware Simultaneous
  4. What NI Products Feature Simultaneous Sampling?

1. Simultaneous Sampling Architecture – Simultaneous Sample and Hold (SSH)

The two most common simultaneous sampling architectures are SSH and multi-analog-to-digital converter (multi-ADC). The SSH architecture is a derivative of the multiplexed (mux’ed) architecture, the most common architecture used in mid- to high-channel-count data acquisition devices. Multiplexed devices use one common amplifier and ADC to sample many input channels, resulting in a time delay between contiguous samples. You can minimize this time delay, but you are limited by the performance of the ADC/amplifier combination. To achieve simultaneous sampling with a multiplexed architecture, the data acquisition device must contain SSH circuitry for each input channel before the ADC/amplifier. This SSH circuitry can be either designed on the data acquisition device or purchased in addition to the data acquisition device in the form of signal conditioning.


Figure 1.

In operation, the SSH circuits track the incoming signals before each input scan. Just before a scan begins, the data acquisition device simultaneously places the SSH circuits in hold mode where a capacitor within each SSH circuit maintains a constant voltage. After all inputs are scanned in order, the data acquisition device returns the SSH circuits to tracking mode and waits for the next hold mode command. Using the SSH method, the input voltages are simultaneous even though the inputs are sampled at different times.

Figure 2. 


Historically, the SSH architecture has been popular for mid- to high-channel-count simultaneous-sampling systems, mainly due to cost per channel. However, when this architecture became popular more than 10 years ago, it was much less expensive to include an SSH circuit per channel and have one ADC/amplifier rather than have an ADC/amplifier per channel. During the last 15 years, a typical 16-bit ADC has decreased in price by about 75 percent, which makes it much more cost-effective to use an ADC/amplifier per input channel. Because the cost per channel – compared to a parallel multi-ADC architecture – is now much less of an issue, several other trade-offs in the SSH/multiplexed architecture become more important. The addition of SSH circuitry adds settling time complexities and latencies to an already complex multiplexed architecture. The latencies of the SSH circuitry, including hold mode and track mode settling time, as well as the shared scan rate among all input channels lessens the applicability of these devices to high sample rate simultaneous sampling applications such as sound, vibration, or transient recording.


Figure 3.

For example, when a multiplexed device capable of 100 kS/s scans eight channels, the scan rate per channel is divided down to 12.5 kS/s per channel. With the addition of SSH circuitry and the inherent latencies, the typical scan rate for each channel is further reduced by ~30 percent to about 8.3 kS/s per channel. The multiplexed architecture is not optimized for scan rate per channel, an important consideration for simultaneous sampling applications. The addition of SSH circuitry further reduces its applicability.

Multiplexed data acquisition devices, with or without SSH circuitry, are typically optimized for DC measurements due to the types of signals that are most commonly measured: temperature, static strain, static pressure, and so on. Because these multiplexed data acquisition devices share the same ADC/amplifier combination for multiple input channels, the ADC/amplifier must be able to absorb large changes in the input at high scan rates while maintaining sufficient DC accuracy. When a multiplexed data acquisition device is optimized for settling time error, or errors caused by one signal affecting an adjacent signal in a sample list, the by-product can be distortion at mid- to high-input frequencies. Distortion minimally affects the temperature or pressure readings. However, distortion at mid- to high-frequencies is not acceptable for dynamic measurements. You can minimize distortion in the multiplexed architecture, but only through additional circuitry and cost, negating the main reason the multiplexed architecture was initially considered.

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2. Simultaneous Sampling Architecture - Multi-ADC

The multi-ADC architecture delivers higher sample rates per channel, better dynamic accuracy, and less complexity. This architecture does not require a multiplexer to route all incoming signals to a single ADC nor does it require additional SSH circuits to achieve simultaneous sampling. The absence of multiplexers and SSH circuits greatly simplifies the signal path on the data acquisition device. This simplification permits the optimization of both DC measurements and dynamic measurements while maintaining a low cost per channel. The multi-ADC architecture is flexible, offering the capability to sample multiple incoming signals independently or simultaneously. In addition, the input sample rate is not divided among the number of inputs but is constant.

For an example of how input throughput differs between architectures, compare a high-speed multiplexed device (without SSH) and a low- to mid-speed multi-ADC device.

Manufacturer Model Architecture Speed Resolution Channels (Diff)
NI PCI-6250 Multiplexed 1.25 MS/s 16 bits 8
NI PCI-6143 Multi-ADC 250 kS/s/ch 16 bits 8

Table 1.

 

Figure 4.

As expected, the sample rate per channel decreases as the channel-count increases for the multiplexed device and remains constant for the multi-ADC device. Even though the multiplexed device appears to be five times faster on the data sheet, the multi-ADC device has a higher sample rate per channel for applications requiring more than four channels. In fact, when all eight input channels are sampled, the multi-ADC device offers 100 percent more throughput and the price is comparable (about 20 percent more). Remember that the multiplexed device in this example is not capable of simultaneous sampling, and would experience a ~30 percent decrease in sample rate if you added SSH. 

See also:
NI PCI-6143 Simultaneous Sampling Multifunction DAQ
NI PCI-6250 Multiplexed Multifunction DAQ

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3. Software Makes All Timed Hardware Simultaneous

How can you get simultaneously sampled data if your data acquisition device does not feature simultaneous sampling? Software. Move the work from the data acquisition device to the computer processor. While there are a few stipulations, using numerical methods to align waveforms taken at different known points in time can be an accurate and useful method. Waveform-aligning numerical methods are not limited to postprocessing – you also can use them in real time. For low- to medium-sample-rate applications, the processing power of a low-cost PC is sufficient to crunch many channels of data in real time, making true simultaneous sampling hardware unnecessary.

For example, data from a multiplexed data acquisition device is not simultaneously sampled without the addition of SSH circuitry. However, there is a known time delay between consecutive data points, which makes it a candidate for the waveform alignment algorithm. You can use this time delay to align multiple signals and achieve simultaneous sampling without additional circuitry. 


Figure 5.

The two input signals in the first graph are sampled at different instances in time, similar to data from a multiplexed data acquisition device. After applying a linear interpolation alignment algorithm to Channel 2 from the first graph, the second graph shows the aligned data, accurately simulating simultaneous sampling hardware. While a simple linear interpolation algorithm was applied in this case, there are more sophisticated and accurate algorithms that you can apply such as spline or finite impulse response (FIR) filtering.

The Align and Resample Express VI in LabVIEW 7.0 and later provides an easy-to-use, interactive interface to configure the alignment or resampling task. Once configured, simply pass multiple waveforms into the “align and resample.vi” to perform the processing. You can apply this algorithm in real time or during postprocessing.


Figure 6.

There are a few cases where you should not use alignment algorithms, including transient signals and any other signals with known aliased data. These algorithms are suggested for use with repetitive signals. For applications that require low to medium sample rates, numerical signal alignment methods with multiplexed data acquisition devices can be a cost-effective and accurate solution.

See also:
Resample and Align Waveforms with One Simple Express VI

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4. What NI Products Feature Simultaneous Sampling?

There are several product families within the NI product portfolio that deliver simultaneous sampling. These products range from subhertz to 2 GHz sample rates and from 8- to 24-bit resolution. Based on their range of capabilities and form factors, they apply to a broad range of applications from sound and vibration to transient recording.


Figure 7.

 
Dynamic Signal Acquisition
X Series and S Series Multifunction DAQ
High-Speed Digitizer
Simultaneous Sampling
þ
þ
þ
Resolution (bits)
Up to 24
Up to 16
Up to 16
Sample Rate (sample/s)
Up to 204.8 k
Up to 10 M
Up to 200 M
Channels
Up to 16
Up to 16
Up to 8
Antialias Filtering
þ
ü
ü
Deep Onboard Memory
--
Up to 64 MS
Up to 256 MS
Counters
--
þ
--
Digital I/O
--
Up to 48
--
Analog Output Channels
Up to 2
Up to 4
--
Bus
PCI, PXI, PXI Express
USB, PCI, PXI, PXI Express
PCI, PXI, PXI Express, USB
Bandwidth
Up to 92 kHz
Up to 7.2 MHz
Up to 1 GHz

    þ all products have feature
    ü some products have feature

Table 2.

Specifications and Pricing
Dynamic Signal Acquisition
Simultaneous Sampling Multifunction DAQ
High-Speed Digitizers

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