1. Input/Output Current and Fan-Out
The fan-out of a subfamily of digital gates is defined as the number of gates of the same subfamily that can be connected to a single output without exceeding the current ratings of the gate. A typical fan-out for most TTL families is 10. Figure 1 shows an example of fan-out with 10 gates driven from a single source.
Figure 1. Ten Gates Driven from a Single Source
Fan-out is determined by the amount of input current (II) a gate load draws, and how much output current (IO) the driving gate can supply. For example, in Figure 1 the single 7400 is the driving gate, supplying current to 10 other gate loads. For a 7400, the maximum output current capability for the logic HIGH condition (IOH) is -400 µA (the negative value indicates current leaving the gate). In other words, the 7400 can source a maximum of 400 µA of current.
For the 74xx subfamily, the input current requirement for the logic HIGH condition (IIH) is 40 µA. To find the fan-out, divide the source current capability by the input current requirements for a gate. In this case, fan-out = 400 µA /40 µA = 10.
For the logic LOW condition, the output current capability (IOL) for the 7400 is 16 mA and input current requirement (IIL) for each 74xx gate is -1.6 mA. Again, by dividing the source current capability by the input current requirements, we find that fan-out = 16 mA/1.6 mA = 10. The fan-out is the lower of the values for the logic HIGH and logic LOW conditions. In this case, the fanout for both states is the same, so the fan-out for a 7400 driving 74xx subfamily gates is 10, because the 7400 can sink or source the current from a maximum of ten 74xx subfamily gates.
Figure 2. TTL Gate Sinking the Input Current from Two Gate Inputs
Let's take a look at one more example. In Figure 2, gates G2 and G3 are connected to the output of gate G1. The total current that G1 must sink, in this case, is 2 * IIL = 2 * 1.6 mA = 3.2 mA, which is well within the maximum current rating (16 mA) for G1.
For the logic HIGH output condition, G1 is now sourcing current to G2 and G3, so the current flow is reversed, as shown in Figure 3. The total current that the G1 gate must source is 2* IIH = 2 * (-40 µA) = -80 µA, which is well below the maximum allowed logic HIGH output (IOH) current rating of -400 µA.
Figure 3. TTL Gate Sourcing Current to Two Gate Inputs
2. Open Collector Outputs
Some applications require you to connect the outputs of several devices together to drive a single signal. For these applications, consider open-collector outputs in order to avoid bus fight. Bus fight occurs when different gates attempt to drive a signal to different logic states. Unlike outputs that drive signals either HIGH or LOW, open-collector outputs either drive their outputs LOW or let them float. If several open-collector outputs are attached to the same signal, the signal will go LOW if any of the outputs is LOW. But what if you want to drive a logic HIGH? To drive a logic HIGH with an open-collector output, you add an external resistor, called a pull-up resistor, as shown in Figure 4.
3. Tristate Outputs
While open-collector outputs have two states, LOW and FLOAT, tristate outputs have three, as the name implies. The states are LOW, HIGH and FLOAT. Floating the tristate output is also referred to as tristating or going into a high-impedance state. Tristate devices are very useful when you want to allow more than one device to drive the same signal, but you want to ensure that only one device is driving the signal at any time.
Figure 5. Schematic of a Tristate Driver
Figure 5 shows a schematic of a tristate driver. Note that in addition to the input and output lines, there is a select line. When the select signal is asserted, the tristate driver output is the same as the input (LOW or HIGH). When the select signal is not asserted, the output of the tristate driver floats.
4. Floating Signals (or Multiply-Driven Signals)
Figure 6. A Circuit Using Tristate Drivers
Figure 6 shows one output connected to three tristate drivers. There are two potential problems that can arise with this circuit. First, what happens if none of the select signals are asserted? In this case, nothing drives the output signal, so the output signal floats. Depending upon transient conditions in the driver and in the parts that are sensing the signal, output could be sensed as a HIGH, a LOW, or somewhere in between. If a part of the circuit depends on the state of the output signal, the behavior of the entire circuit may become unpredictable.
The usual solution to the problem of floating signals is to add a part to the circuit that drives the signal HIGH (or LOW) by default. A resistor with one end connected to VCC and the other end connected to a signal (a pull-up resistor) forces the signal HIGH when none of the select signals are asserted and none of the drivers drives the output signal, because enough electrical current flows through the resistor to drive the voltage HIGH. When one of the drivers drives the output signal LOW, some current still flows through the resistor, but not enough to raise the voltage significantly. To force the output signal LOW instead of HIGH, use a pull-down resistor. A pull-down resistor works like a pull-up resistor, except it attaches the signal to ground instead of VCC, and the output signal goes LOW if it is not driven.
The second problem arises if more than one select signal is asserted at the same time, causing more than one of the drivers to drive the output signal. Unlike open-collector circuits, if more than one tristate device drives oiutput LOW while another drives output HIGH, a bus fight occurs. Bus fight can cause tristate devices to overheat and burn up just like other devices. If the select signals are software-controlled, you must ensure that no two of the select lines are asserted simultaneously.
5. Wired-OR Connections
Figure 7. Wired-OR Connection
When open-collector gates are wired together as shown in Figure 7, the connection is called a wired-OR connection. We can combine NOR gates and NAND gates with wired-OR connections and the output will be LOW if any one of the inputs is LOW. Wired-OR circuits are sometimes called wired-AND circuits, since the output is HIGH only when all the inputs are HIGH. Generally, these circuits are called wired-AND for positive-true logic, and wired-OR for negative-true logic.
6. Applications for Wired-OR Connections
1. Emitter-coupled logic (ECL) devices, whose outputs are open-emitter instead of open-collector, are also suited for wired-OR connection.
2. For interrupt lines in a computer, which do not transfer data but merely indicate if at least one device is requesting attention, you can use wired-OR outputs.
7. Using the NI 653x in Wired-OR Mode
You can configure an NI 653x for wired-OR output mode. As we mentioned earlier, you need a pull-up resistor to drive a wired-OR output line HIGH. With the NI 653x, connect the DPULL pin to the +5 V pin to place 100 kW pull-up resistors on all the data lines.
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