NI R Series Multifunction RIO Frequently Asked Questions (FAQ)

1. What is RIO technology?

With National Instruments reconfigurable I/O (RIO) technology, you can define your own custom measurement hardware circuitry using reconfigurable field-programmable gate array (FPGA) chips and NI LabVIEW graphical development tools. NI R Series multifunction RIO devices offer the best combination of value and performance by integrating this FPGA technology with eight analog inputs, eight analog outputs, and 96 digital I/O lines into a single device that is offered on standard PC form factors such as PCI, PCI Express, and PXI/CompactPCI. Using the LabVIEW FPGA Module, you can create your own hardware personalities for custom data acquisition, high-speed control, digital communications protocols, sensor simulation, and onboard signal processing without in-depth knowledge of hardware description languages.

Figure 1. R Series devices are offered on standard PC form factors such as PCI, PCI Express, and PXI/CompactPCI.

Learn more about R Series devices.

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2. What are the new R Series devices?

The new R Series multifunction RIO devices are the NI 7841R, NI 7842R, NI 7851R, NI 7852R, NI 7853R, and NI 7854R. Table 1 lists the features of these new devices such as 750 kS/s simultaneous analog input rates, 1 MS/s simultaneous analog output rates, and new high-performance Virtex-5 FPGA chips. You can configure each of the 10 new R Series devices using the LabVIEW FPGA Module.

Table 1. Multifunction and Digital R Series Devices

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3.  How do the new R Series devices compare with previous-generation R Series devices?

The new R Series devices are equipped with high-performance Virtex-5 FPGAs, which offer improved optimization capabilities to achieve faster code execution and more LabVIEW code capacity than previous-generation R Series devices. Virtex-5 FPGAs feature a new six-input lookup table (LUT) architecture for substantially improved resource utilization as well as digital signal processing (DSP) slices that make it possible for you to implement more complex DSP at faster rates. The new Virtex-5 LX30 FPGA is approximately twice the size of a Virtex-II 1M gate FPGA, and the new Virtex-5 LX50 FPGA is slightly larger than a Virtex-II 3M gate FPGA.

Compare Virtex-II FPGAs with Virtex-5 FPGAs using the LabVIEW FPGA Benchmarks for Virtex-5 R Series Targets white paper.

In addition, the new NI PXI-785xR modules can sample up to 750 kS/s on all eight analog input channels with 16-bit resolution. Proportional integral derivative (PID) control loops can run more than 3.5 times faster than previous-generation R Series hardware, and, with FPGA-based parallel execution, multiple control loops do not have to compete for processor bandwidth. Faster analog input rates also improve analog triggering precision and frequency measurement capabilities.

The new R Series devices require NI-RIO Version 3.2 or later driver software. If you have an earlier version of NI-RIO, upgrade to the latest version for free.

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4. How many gates are there in the new Virtex-5 FPGAs?

The number of gates has traditionally been a way to compare FPGA chips to ASIC technology, but it does not truly describe the number of individual components inside an FPGA. This is one of the reasons why Xilinx did not specify the number of gates for the new Virtex-5 family. LabVIEW FPGA benchmarks have shown that the new Virtex-5 LX30 FPGA is approximately twice the size of a Virtex-II 1M gate FPGA, and the new Virtex-5 LX50 FPGA is slightly larger than a Virtex-II 3M gate FPGA. The Virtex-5 LX85 and Virtex-5 LX110 FPGAs are even larger.

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5. How do I decide which FPGA is right for my application?

Unfortunately, it is difficult to determine whether an application or program will require a larger or smaller FPGA. The LabVIEW FPGA Module and NI-RIO driver give you the ability to compile block diagrams without having any hardware at all, so the best way to see how many resources you need is to try it.

You can use the following as a general guideline when deciding which FPGA works for your application: For an application that performs basic timing, triggering, and synchronization on the FPGA, you can use a smaller FPGA. If the application includes timing, triggering, and synchronization along with additional signal processing on the FPGA (control, digital filtering, complex analog triggering), you need a larger FPGA that has more resources to implement those operations.

Learn more about how FPGAs work at a lower level from the FPGAs - Under the Hood white paper.

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6.  Will my Virtex-II program work on a Virtex-5?

In general, a program compiled for a Virtex-II 1M gate FPGA should also compile for a Virtex-5 LX30 or larger, and a program compiled for a Virtex-II 3M gate FPGA should also compile for a Virtex-5 LX50 or larger. Due to architectural differences between the two FPGA families, there are no guarantees, and the only way to see if a program migrates between families is to try it.

With the LabVIEW FPGA Module and NI-RIO driver, you can compile block diagrams without having any hardware at all. To add support for the new Virtex-5 R Series targets, simply upgrade to the latest version of NI-RIO for free.

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7. What are the benefits of Virtex-5 FPGAs?

Figure 2. NI PXI-7852R with Virtex-5 FPGA Chip Circled in Red

The Virtex-5 FPGA architecture is optimized to execute faster and more efficiently using single-cycle timed loops in the LabVIEW FPGA Module. The fundamental building blocks for implementing digital logic inside FPGA chips are called slices, and each slice is composed of flip-flops and LUTs. Previous-generation Virtex-II FPGAs use four-input LUTs for up to 16 combinations of digital logic values. The new Virtex-5 FPGAs use six-input LUTs for up to 64 combinations, increasing the amount of logic that you can implement per slice. In addition, the slices themselves are placed in closer proximity to each other to reduce the propagation delay of electrons and increase overall execution rates. This means that for LabVIEW FPGA applications, the single-cycle timed loop structure takes advantage of six-input LUTs for substantially improved resource utilization. You can now optimize more LabVIEW FPGA code to fit within Virtex-5 FPGAs and perform more operations per clock cycle.

Learn more about the advantages of Xilinx Virtex-5 FPGAs.

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8. Do I need to know VHDL to use LabVIEW FPGA?

No. Using the LabVIEW FPGA Module, you can synthesize graphical code directly from LabVIEW to the FPGA on R Series devices. While knowing how LabVIEW compiles the graphical block diagram to VHDL can help you pinpoint optimization trade-offs, you do not need to understand FPGAs or VHDL to use LabVIEW. LabVIEW is ideal for engineers who need the hardware customization that FPGA technology offers but who do not know or understand low-level hardware description languages such as VHDL or Verilog.

Learn more about the LabVIEW FPGA Module.

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9. Do I need the LabVIEW FPGA Module to program R Series devices?

Yes, you must use the LabVIEW FPGA Module to program R Series devices. However, if you have existing VHDL IP cores or other VHDL code you wish to use, you can integrate VHDL into a LabVIEW block diagram using the HDL Interface Node.

Read this application note to learn how to integrate VHDL into a LabVIEW block diagram.

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10. Can I program my R Series device in C/C++?

With the new C Interface to LabVIEW FPGA, you can program the real-time processor on NI FPGA-based hardware using C tools such as NI LabWindows™/CVI and Microsoft Visual Studio, and interface to the LabVIEW FPGA code running on the FPGA. In other words, the code running on your host machine can be written in C/C++ or LabVIEW, while the code actually deployed to the FPGA must be written in LabVIEW FPGA.

Learn more about the C Interface to LabVIEW FPGA.

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11. How is R Series different from other data acquisition families?

Instead of a fixed ASIC for controlling device functionality, R Series data acquisition (DAQ) offers a user-programmable FPGA chip for onboard processing and flexible I/O operation. R Series multifunction RIO devices feature a dedicated analog-to-digital converter (ADC) per channel for independent timing and triggering. This offers specialized functionality such as multirate sampling and individual channel triggering, which are beyond the capabilities of typical data acquisition hardware. You can define the hardware-timed digital I/O on R Series devices as counters, PWM channels, flexible encoders, or lines for digital communication protocols.

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12. Can I program R Series devices with NI-DAQmx, NI-DAQmx Base, or the NI Measurement Hardware DDK?

All R Series multifunction RIO devices use NI-RIO driver software; they are not compatible with NI-DAQmx or NI-DAQmx Base. There is support, however, within the NI Measurement Hardware DDK (Driver Development Kit) for custom driver development through register-level programming. Once you have compiled and downloaded a LabVIEW FPGA application to an R Series target, the NI Measurement Hardware DDK provides documentation for the host application to interface with registers on the FPGA across the PCI or PXI bus.

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13. What are the R Series onboard processing capabilities?

The LabVIEW FPGA Module includes a signal processing palette with numerous functions such as:

• PID control
• Butterworth filters (highpass and lowpass)
• Notch filters
• Analog period measurement
• DC and RMS measurement

You can easily implement functionality such as digital debounce filters and watchdog timers in LabVIEW, and you can find many more functions and examples on the LabVIEW FPGA IPNet.

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14.  Can I achieve simultaneous analog input/output with an R Series device?

Yes. All R Series multifunction devices have dedicated ADCs and digital-to-analog converters (DACs) on every analog input/output channel, making it possible to sample/update all channels simultaneously or at different rates. With independent ADCs, you can sample every channel on the device at the maximum rate (up to 750 kS/s). You can program the independent DACs to update analog output channels at rates up to 1 MS/s.

The LabVIEW FPGA block diagram in Figure 3 shows how easy it is to implement simultaneous analog input/output on R Series FPGAs. By using a LabVIEW FPGA Analog Input I/O Node that is reading from all eight channels of the NI PXI-7854R module in the same while loop, the program samples from all eight channels at 750 kS/s simultaneously. The lower loop running in parallel uses the LabVIEW FPGA Analog Output I/O Node and updates all eight analog output channels at 1 MS/s.

Figure 3. Simultaneous Analog Input/Output with R Series and LabVIEW FPGA

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15. Can I use CompactRIO I/O modules with R Series to provide industrial I/O, isolation, and signal conditioning?

Yes. Using the NI 9151 R Series expansion chassis for NI CompactRIO (shown in Figure 4), you can house up to four CompactRIO I/O modules per expansion chassis for high-performance, industrial signal conditioning. The NI 9151 connects directly to the digital connector on PXI and PCI R Series data acquisition devices. You can choose from several I/O modules including 24 V industrial digital I/O with up to 32 channels per module, which is ideal for creating industrial counter/timers, electromechanical relays, ±80 mV thermocouple inputs, ±5 V IEPE accelerometer analog inputs, and simultaneous voltage and current analog outputs.

Figure 4. NI 9151 R Series Expansion Chassis for CompactRIO

Learn more about the NI 9151 R Series expansion chassis for CompactRIO.

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16.  What are some other LabVIEW FPGA capabilities?

LabVIEW FPGA can meet a myriad of unique application challenges that often require custom hardware. Below is a short list of the tasks you can implement using LabVIEW FPGA and R Series:

• Signal processing functions such as filters and fast Fourier transforms (FFTs)
• Digital communication protocols
• High-speed analog and discrete control loops
• Custom motion control
• Analog and digital signal generation

Visit LabVIEW FPGA IPNet for an extensive list of LabVIEW FPGA functions and examples.

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