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Publish Date: Dec 20, 2011


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HDL Interface Node FAQ

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Table of Contents

  1. What is the HDL Interface Node?
  2. Is the HDL Interface Node an advanced feature?
  3. Can I get better efficiency with my code using the HDL Interface Node?
  4. Does the HDL code support floating point or fixed point data types?
  5. What versions of HDL are supported by the HDL Interface Node?
  6. How do I use the HDL Interface Node?
  7. If I don't understand HDL, but have code written that I want to run in LabVIEW FPGA, where do I go for help?

What is the HDL Interface Node?

The HDL Interface Node is a configurable VI that allows you to integrate VHDL code into your LabVIEW FPGA VI. The API resembles the Call Library Function Node. You can type your VHDL code directly into the Configure HDL Interface Node dialog box. You also can specify .vhd files in the Configure HDL Interface Node dialog box.

Is the HDL Interface Node an advanced feature?

Yes. Much like the Call Library Function Node, if you have code that is already appropriate for use with the LabVIEW FPGA Module, you can use it easily. However, to incorporate most VHDL code or IP cores, you must have an understanding of VHDL and some information about how the LabVIEW FPGA Module and the HDL Interface Node work. For pertinent reference material, see the related links.

Can I get better efficiency with my code using the HDL Interface Node?

Since the introduction of the Single-Cycle Timed Loop in the LabVIEW FPGA Module 1.1, HDL is no longer the only way to access high loop rates. Aside from the advantage of integrating existing VHDL code, the HDL Interface Node may offer a smaller hardware resource consumption. This is not guaranteed and short of compiling both implementations, LabVIEW FPGA code and VHDL in an HDL Node, there is not a diagnostic tool that can determine the difference in resource usage. The LabVIEW FPGA Module offers an advantage of typically shorter development time by enabling the user with descriptive troubleshooting tools and detailed example programs for general use cases.

Does the HDL code support floating point or fixed point data types?

No. HDL does not directly support floating or fixed point numbers. Since LabVIEW 8.6, the FPGA Module does support fixed point numbers, but not floating point.

What versions of HDL are supported by the HDL Interface Node?

At this time, the LabVIEW FPGA Module only supports VHDL. You can add other code to the HDL Interface Node, but you first must compile the code into a Net List. 

How do I use the HDL Interface Node?

The Developer Zone document Importing HDL Code into FPGA VIs Using the HDL Interface Node explains the details of using the HDL Interface Node. Also, searching the LabVIEW Help for "HDL Interface Node" will bring up useful getting started information. This article will only appear if the FPGA Module is installed. Note that as of LabVIEW 2009 Service Pack 1, the HDL Interface Node and the Component Level Intellectual Property (CLIP) Node are the only methods for deploying VHDL to a National Instruments FPGA target. Third party application development environments do not have access to the FPGA on an NI target.

If I don't understand HDL, but have code written that I want to run in LabVIEW FPGA, where do I go for help?

The LabVIEW FPGA Module makes it easy to write code to run on a FPGA without requiring the you to know HDL. However, you must have an understanding of HDL to incorporate HDL into LabVIEW FPGA VIs.

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