NI takes advantage of the features of devices in its products while simplifying the programming so that engineers and scientists can work in an environment that is familiar without having to delve too far into the low-level details of Xilinx device programming. This article takes a brief look at the heritage and high points of Zynq SoC at the heart of the innovative cRIO-9068 line of NI products.
Xilinx cofounder, Ross Freeman, invented the FPGA in 1988 and was posthumously honored with an induction into the National Inventors Hall of Fame in 2010. In the 25 years since Freeman invented the FPGA, the company he founded has quickly moved the programmable innovation banner forward. In that time, the company has evolved its devices from thousand-gate, glue-logic utility devices into what is considered “all programmable devices.” Going beyond the nomenclature of a “gate array,” today’s Xilinx devices integrate millions of gates, digital signal processing (DSP), memory, hardened peripheral IP, and up to 28 Gbit/s I/O on a single device.
Starting in 2008, Xilinx began executing a plan to definitively expand its portfolio and what’s possible with “programmable.” At the 28nm node, the company delivered an industry-leading line of All Programmable FPGAs, including the Virtex-7, Kintex-7, and Artix-7 FPGAs; it also introduced the world’s first homogeneous and heterogeneous All Programmable 3D ICs and innovative award-winning device called the Zynq-7000 All Programmable SoC.
Figure 1. The Zynq-7000 All Programmable SoC marries a dual-core ARM Cortex-A9 processing system, 28nm FPGA fabric, and key peripherals on a single device.
NI technologists played a key role in helping Xilinx define the requirements for the Zynq-7000 All Programmable SoC, as they shared the vision for the tremendous value and leap in programmability the device would offer for future products. The Zynq SoC is the first commercial device to marry dual-core ARM Cortex-A9 microprocessors, FPGA fabric, and key peripherals on a single device (Figure 1). The processor and FPGA fabric communicate over 10,000 internal interconnect, delivering a performance between a microprocessor and FPGA fabric that is physically impossible to accomplish between a discrete processor and an FPGA implemented on a printed circuit board.
Prior to the Zynq SoC, Xilinx delivered several FPGAs that incorporated PowerPC cores in their silicon, but based on that and other experiences, Xilinx gave the Zynq SoC a much more user-friendly programming method. The Zynq SoC isn’t called an “FPGA” because it is unique in that the processing system runs the show, instead of the FPGA fabric. That is, the processing system boots first and controls the functionality of the FPGA fabric. This means that users don’t have to be fluent in FPGA design techniques get an application running in the processor subsystem of the Zynq SoC. The Zynq SoC gives customers the ability to create their designs in C, C++, or SystemC using the software development of their choice targeting the OS or real-time OS (RTOS) of their choice, and program their design into the Zynq SoC’s processing system. If a part of their design isn’t running fast enough, designers can use Xilinx’s Vivado High-Level Synthesis (HLS) tool to translate an algorithm or part of an algorithm they developed at a C level into VHDL and test that code running on the FPGA fabric section of the Zynq SoC. By off-loading the right functions from the processor onto the FPGA fabric and freeing the processor to do functions it does best, customers can achieve as much as a 700X increase in overall system performance over processor-based designs.
The silicon and its architecture aren’t the only key features of the Zynq SoC. To ensure its success, Xilinx has established broad OS, RTOS, and software development support as well as peripheral IP, application-specific IP support for the Zynq SoC. And with Xilinx’s aerospace and defense heritage, unmatched safety and security were key priorities.
National Instruments has made it even easier for its customers to take advantage of the Zynq SoC with the intuitive G programming language in NI LabVIEW system design software. The combination of the CompactRIO software-designed controller and the intuitive LabVIEW development environment enables system designers to build embedded systems without having to learn hardware design languages required for Xilinx Vivado tool suite or Vivado HLS. The LabVIEW reconfigurable I/O (RIO) architecture also speeds time to market by avoiding the costly development time to build custom hardware from the ground up. Xilinx looks forward to continuing to provide cutting edge All Programmable technology for National Instruments.
Robert Bielby—Senior Director of Strategic Marketing and Business Planning, Xilinx Inc.