Host Programming for the NI PXIe-5644R

Programming with the NI PXIe-5644R vector signal transceiver (VST) at the host level is somewhat different from programming with traditional, vendor-defined instrument drivers. This document describes best practices for instantiating sample projects, creating palettes for and programming with the Simple VSA/VSG sample project host interface, and distributing software written for the NI PXIe-5644R.

1. Host Interface
2. Choosing a Distribution Model
3. Next Steps

Host Interface

Developing host applications beyond those provided as examples in the Simple VSA/VSG sample project for the NI PXIe-5644R VST requires more in-depth knowledge of the default host interface. This host interface is composed of a set of acquisition and generation VIs that are grouped together using NI LabVIEW classes to provide a familiar, session-based interface that resembles NI-RFSA and NI-RFSG driver software. Knowledge of LabVIEW classes is not, however, required to use these VIs. The following sections provide detail on the functions in each of these interfaces.

Acquisition

	Abort—Aborts acquisition on the VST device.
	Check Status—Checks the status of the acquisition. Use this VI to check for any errors that may occur during signal acquisition.
	Close Session—Closes the session to the VST.
	Configure IQ Acquisition—Configures the VST IQ data acquisition with the specified IQ rate and number of samples to acquire.
	Configure Phase Offset—Offsets the phase of acquisition by the given degrees.
	Configure RF In—Configures the frequency and reference level of the RF input signal. Some additional settings are included to modify the LO attributes.
	Configure Spectrum Acquisition—Configures the VST power spectrum acquisition over the specified frequency range. Note that although an error won't be thrown, the frequency limitations of the NI PXIe-5644R are as follows: For center frequencies from 65 MHz to 109 MHz, the maximum span is 20 MHz. For center frequencies from 109 MHz to 6 GHz, the maximum span is 80 MHz.
	Configure Trigger—Configures the VST reference trigger to mark a reference point within a record.
	Export Clocks—Routes the reference clock signal or the sample clock signal to a specified output terminal. If a clock signal is exported to a terminal, it remains exported until this VI is used not to export any signal.
	Fetch—Transfers acquired waveform data from device memory to computer memory; this process is also known as fetching. The data was acquired to onboard memory previously by the hardware after the acquisition was initiated.
	Get Error Codes and Strings—Retrieves the error text for a given code.
	Get IQ Components—Accepts waveform data and returns converted I and Q waveforms.
	Initiate—Initiates acquisition on the VST device.
	Open Session—Opens a session to the device you specify as the resource name parameter and returns a LabVIEW class that you use to identify the VST device in all subsequent VST VIs. This VI uses a policy that allows multiple sessions to be opened to the VST at once. With this policy, whichever session sets the reference clock source last is the one that overrides the rest.
	Read Spectrum—Returns power spectrum data from the VST device.
	Synchronize Triggers—Sets this VST as either the master or a slave for acquisition trigger synchronization among multiple VSTs.
	Wait Until Settled—Waits until the RF input signal settles. Call this VI after making a dynamic change in signal acquisition to wait for the input signal to settle.

Generation

	Abort—Aborts generation on the VST device.
	Allocate Waveform—Allocates space in memory for a waveform sequence on the VST. With additional calls to Write Waveform specifying the same waveform name, this allocated space can be written to until the allocated space is taken up (in which case an error occurs).
	Check Status—Checks the status of the generation. Use this VI to check for any errors that may occur during signal generation.
	Clear Waveform—Deletes a specified waveform from the pool of waveforms that are currently defined. If you call the Initiate or the Set Selected Sequence VIs right after calling the Clear Waveform VI, the Initiate and Set Selected Sequence VIs do not return errors because these VIs do not validate the selected sequence against existing waveforms.
	Close Session—Closes the session to the VST.
	Configure Generation Mode - CW—Configures the VST to generate a continuous waveform.
	Configure IQ Rate—Configures the IQ rate of signal generation for the VST. Do not use this VI if you plan to use CW mode.
	Configure Phase Offset—Offsets the phase of generation by the given degrees.
	Configure RF Out—Configures the frequency, power level, and gain of the RF output signal. Some additional settings are included to modify the LO attributes. Note that this VI uses peak power mode, which specifies the maximum power that can be generated from any waveform in the sequence that is set in Set Selected Sequence.vi.
	Configure Trigger—Configures the VST to wait for a start trigger at the beginning of the generation.
	Disable Output—Disables the RF output signal. To re-enable the output signal, call Configure RF Out.vi with the output enabled parameter set to true.
	Export Clocks—Routes the reference clock signal or the sample clock signal to a specified output terminal. If a clock signal is exported to a terminal, it remains exported until this VI is used not to export any signal.
	Get Error Codes and Strings—Retrieves the error text for a given code.
	Initiate—Initiates generation on the VST device.
	Open Session—Opens a session to the device you specify as the resource name parameter and returns a LabVIEW class that you use to identify the VST device in all subsequent VST VIs. This VI uses a policy that allows multiple sessions to be opened to the VST at once. With this policy, whichever session sets the reference clock source last is the one that overrides the rest.
	Set Selected Sequence—Selects a waveform sequence on the VST by name.
	Synchronize Triggers—Sets this VST as either the master or a slave for trigger synchronization among multiple VSTs.
	Wait Until Settled—Waits until the RF output signal settles. Call this VI after making a dynamic change in signal generation to wait for the output signal to settle.
	Write Sequence—Writes a waveform sequence to the VST, based on the given waveform names. Each waveform has the option to wait for a sequence trigger before getting advanced to in the sequence.
	Write Waveform—Writes a waveform sequence to the VST, based on the given IQ data. If the waveform size in samples field is specified, that amount of space is allocated for the waveform. With additional calls to Write Waveform specifying the same waveform name, this allocated space can be written to until the allocated space is taken up (in which case an error occurs). The IQ data that is specified must be normalized to plus or minus 1 V.

Choosing a Distribution Model

Two basic models for the distribution of applications written using the Simple VSA/VSG host interface impact host programming and subVI linking. The first method, project-based distribution, uses relative paths for linking host application code to the subVIs of the host interface. This enables the distribution of the entire application, including in the application code, host interface, FPGA bitfile, and LabVIEW project, as a single component, usually within a single top-level folder on disk. Project-based distribution has the advantage of easy portability between computers, requiring that only NI LabVIEW 2012 Support for NI PXIe-5644R be installed.

API-based distribution uses absolute paths for linking host application code to the subVIs of the host interface, specifically linking to an automatically searched path in LabVIEW such as c:\Program Files\National Instruments\LabVIEW 2012\user.lib\. This enables individual VIs to be distributed without the associated project, host interface, and FPGA bitfile. It can also simplify programming, allowing custom palettes in LabVIEW, and enabling VI development outside a specific project context. API-based distribution enables individual VIs to be distributed between computers, but the host interface it depends on must be independently installed into user.lib in addition to NI LabVIEW 2012 Support for NI PXIe-5644R. 

Project-Based Distribution

To create a Simple VSA/VSG sample project for project-based distribution, in the Create Project dialog, select a path to a user-owned location on disk, such as the desktop or My Documents folder.

Optionally, add a File Name Prefix and customize the VI icon. Note that the custom VI icon applies to only top-level and helper VIs in the project and not the host interface VIs in the acquisition and generation LabVIEW classes. To edit the icon template for each class, right-click on the class in the project and select Properties»General Settings»Edit Icon..., or to edit the wire color, Properties»Wire Appearance.

To create a new VI, select File»New VI.

Save this VI in the same location as the sample project folder. 

Begin programming by copying an Open Session.vi from the project into the new host VI.

To access subsequent host interface VIs, right-click on a host VI and select Acquisition Palette.

Alternatively, right-click on the class wire to access this same palette. 

To distribute this VI to another computer, ensure that NI LabVIEW 2012 Support for NI PXIe-5644R is installed on the destination machine and then move the entire project folder from the source machine to a user-owned directory on the destination machine. 

API-Based Distribution

To create a Simple VSA/VSG sample project for API-based distribution, in the Create Project dialog, select a location in the user.lib folder in the LabVIEW directory. Prepend the folder name with an underscore (_) so that palettes are not automatically generated for all VIs within the sample project. 

Custom Palettes

After creating a Simple VSA/VSG sample project in user.lib, to create custom palettes in LabVIEW, go to Tools»Advanced»Edit Palette Set... Proceed to the Functions palette and then User Libraries. Right-click on the palette and select Insert»Subpalette... 

Select the option to Create a new palette file (.mnu). 

Place the new .mnu file in the sample project directory.

Name the palette something similar to the sample project.

Optionally, right-click and edit the subpalette icon. 

Click on the newly created subpalette and then right-click and select Insert»Subpalette... 

Select Link to a directory.

Select the public directory of the acquisition class directory.

Right-click on the palette and select Rename Subpalette...

Rename the palette "Acquisition."

Repeat this process for generation. 

When finished modifying the palettes, select Save Changes.

The new palettes should be available from the block diagram.

Host interface VIs located in any location on disk or in any project can access these VIs. Note that multiple copies of the same sample project in user.lib may appear to present the same host interface. This should only occur when multiple FPGA personalities with customized host interfaces are necessary on the same machine. To avoid confusion, change the color of the host interface classes when customizing FPGA functionality.  

Moving an API-Based Host VI to Another Computer

To move an API-Based host VI to another computer, ensure that NI LabVIEW 2012 Support for NI PXIe-5644R is installed on the destination machine. Then either move the host interface project from user.lib on the source machine to user.lib on the destination machine, or if there have been no modifications to the host interface, simply re-create it with the same name and location as on the source machine. After these steps, you can move any individual application VI, regardless of its location on disk or inclusion in a project, to the destination machine and automatically link it to the host interface in user.lib.

Next Steps

The same distribution mechanisms described in this document can also be used with custom FPGA capabilities and extensions of the host interface. For more details on downloading examples with FPGA enhancements, sources for application IP, and additional FPGA customization, proceed to Step 3 at ni.com/vstgettingstarted.

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