PCI Express External Interfaces

Publish Date: Jun 27, 2012 | 1 Ratings | 1.00 out of 5 |  PDF

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3. PCI Express External Interfaces

Since the invention of GPIB in the 1960s, automated test systems have relied on PCs to provide the central control for instrumentation hardware and to automate testing procedures. PCs in various form factors, such as desktops, workstations, and industrial and embedded systems, have been used for this purpose. They offer a variety of interface buses, such as USB, Ethernet, serial, GPIB, PCI, and PCI Express, to interface instrumentation hardware in automated test systems. Because PCs play such a critical role in an automated test system, the test and measurement industry must track the progression of the PC industry and exploit any new technologies for increasing capabilities and performance while lowering the cost of test.

Over the last 10 years, PCs have evolved rapidly in many different ways. As predicted by Moore’s law, CPU processing capabilities have increased by over 75 times in the past decade. Besides the dramatic increase in the processing capabilities, another significant trend has been the emergence of serial communication interfaces and the demise of parallel communication interfaces. PCI Express has replaced PCI, AT, and ISA as the default internal system bus for interfacing peripheral system devices to the CPU. The PCI Special Interest Group (PCI-SIG), the consortium that owns and manages PCI specifications, announced in November 2011 that approximately 24 billion lanes of PCI Express have been shipped in the marketplace since its introduction in 2004, which is a strong testament to its adoption. Similarly, for external interfaces, serial buses such as USB and Ethernet have replaced the parallel port, SCSI, and other parallel communication buses. A market research report published by In-Stat in 2010 expects that by 2012, the number of wired USB-enabled devices shipped will exceed 4 billion. With the proliferation of wireless communications standards such as Wi-Fi and Bluetooth, another recently emerging trend is the consolidation of external physical interfaces on PCs.

The PCI Express bus, used in different implementations, will likely become the interface of choice for automated test systems. Offering the ideal combination of high data bandwidth and low latency, PCI Express is an extremely pervasive technology since it is a fundamental element of every PC. It has also started to blur the boundaries between a system bus, used for interfacing local devices within a system, and an interface bus, used for interfacing external peripheral devices to the system, and will likely continue to dissolve this delineation.

PCI Express brings high throughput, low latency communication to external interfaces.

PCI Express: System Bus for Automated Test Platforms

Since PCI Express is a serial bus, it has a variety of inherent advantages over parallel buses such as PCI and VME. Technical challenges like timing skew, power consumption, electromagnetic interference, and crosstalk across parallel buses become more and more difficult to circumvent when trying to increase data bandwidth. Besides being a technically superior bus, PCI Express, since its release in 2004, has seen continuous improvements in its data transfer capabilities. In 2007, the release of the PCI Express 2.0 specification doubled the data rate from PCI Express 1.0, and in 2010, the release of the PCI Express 3.0 specification doubled the data rate over PCI Express 2.0, providing the ability to transfer data at 16 GB/s per direction. Although the PCI Express standard has been consistently modified, these improvements have not come at the cost of compatibility. PCI Express uses the same software stack as PCI and provides full backward compatibility. Automated test and measurement platforms that use PCI Express as the internal system bus, such as PXI, can leverage all of these advancements to continue to offer more and more capabilities at a low cost. Such platforms, based on their technically superior capabilities, will likely become the central core of all automated test systems.   

PCI Express: External Interface Bus for Automated Test Systems

The high latency and low bandwidth of commonly used external interfaces for automated test, such as GPIB and Ethernet, present a barrier to lowering test times. These interfaces fundamentally constrain the overall efficiency of a test system by limiting the data transfer rate and increasing the time it takes for every transaction. Since CPUs do not natively provide access to these external interfaces, usually some form of conversion occurs inside the PC to translate these external interfaces into the internal system bus, which is PCI Express. PCI Express offers better performance over these other external interfaces and is directly available from the CPU in a PC. This removes the bottleneck imposed by other external interface buses and lowers test times significantly.

"Due to the combination of its excellent performance and pervasiveness, PCI Express is the default choice for system busses. With new fiber-optic and copper cable technologies, it is emerging as the leading choice for high-performance external interfaces."

- Mark Wetzel, Distinguished Engineer for Processor Architectures, National Instruments

The concept of using PCI Express as an external interface bus is not new. The aforementioned PCI-SIG supports an external implementation of PCI Express, formally known as cabled PCI Express. Released in 2007, this implementation provides a transparent way to extend the system bus to interface external devices. Cabled PCI Express is already being used in modular instrumentation platforms such as PXI to provide flexible and low-cost control options. The cabled PCI Express specification formally supports only the use of copper cables, which limits the physical separation between the PC and the device to 7 m. However, when used with electro-optical transceivers, this technology can be extended over fiber cables to offer more than 200 m of physical separation and electrical isolation.

The use of cabled PCI Express technology is reasonably successful in automated test environments. However, its adoption has been isolated to a few relatively niche industries in contrast to the widespread adoption of general PCI Express technology. A more recent implementation of PCI Express as an external interface, Thunderbolt, is a technology Intel pioneered under the codename Light Peak that has the potential to be extremely pervasive. Thunderbolt combines PCI Express and DisplayPort video protocol into a serial interface bus that can be driven over either copper or fiber-optic cables. Since PCs will natively offer Thunderbolt ports, it has the promise to be a high-performance, low-cost, and ubiquitous solution. External PC interfaces based on PCI Express, along with other low-cost interfaces such as USB, will likely be the default interfaces for automated test systems. Applications such as high-volume production test or complex automated verification and validation, which require high performance for data throughput and latency to lower the overall cost of test, will naturally gravitate toward PCI Express-based interfaces. Applications for which these requirements are not strongly desired will likely continue using other interfaces.

PCI Express has been an effective choice for interfacing PCs directly to devices. However, in isolation, it cannot be used as an interface between intelligent systems that have their own independent PCI Express domains. Using PCI Express non-transparent bridges (NTBs) addresses this challenge. An NTB logically separates the two PCI domains while providing a mechanism for translating certain PCI transactions in one PCI domain into corresponding transactions in another PCI domain. This enables PCI Express to be used as a communication interface between intelligent systems. NTBs can be used in a system configuration to interface multiple intelligent subsystems and to interface physically independent systems when used with cabled PCI Express or Thunderbolt. The PXI MultiComputing (PXImc) specification, released by the PXI Systems Alliance (PXISA) in November 2009, standardizes the usage of NTBs and thus provides the framework for creating complex, high-performance test and measurement systems.

Based on current technology trends in the PC industry, such as the dominance of serial communication interfaces, I/O consolidation, and the pervasiveness of wireless communication, PCI Express is the default choice for a system bus and is expected to emerge as the leading external interface bus. Automated test systems that leverage PCI Express, in its various implementations, are positioned to offer the highest performance and most flexibility as well as low cost. They will become the default choice for automated test and measurement applications.


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