RIO Mezzanine Card Connector

Publish Date: Mar 09, 2012 | 0 Ratings | 0.00 out of 5 |  PDF

Table of Contents

  1. Overview
  2. Pin Listing
  3. Next Steps

1. Overview

Figure 1. Top and bottom views of sbRIO-9606 featuring a RIO Mezzanine Card connector.

The RIO Mezzanine Card (RMC) connector is a high-speed, high-bandwidth connector providing direct access to FPGA digital I/O lines as well as certain processor-specific functions.  The connector is the primary method to extend the I/O of NI Single-Board RIO systems that do not implement direct C Series I/O connectors, such as the sbRIO-9605, sbRIO-9606, sbRIO-9623, and sbRIO-9626.  The RMC connector enables users to design custom daughter cards, or RIO Mezzanine Cards, to further customize NI Single-Board RIO to fit specific applications requiring custom circuitry or combination of I/O and peripherals.  The RMC connector is a high-density 240-pin Searay connector.  The mating connector used for RIO Mezzanine Card designs can be ordered through the connector's manufacturer, Samtec, or through a distributor such as Arrow or Avnet.  National Instruments recommends SEAM-40-03.0-S-06-2-A-K-TR as the mating connector.

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2. Pin Listing

The RIO Mezzanine Card connector gives access to 96 FPGA digital I/O lines, USB, and power lines.  The FPGA I/O can be used to interface the NI Single-Board RIO FPGA to custom circuitry and can be controlled with LabVIEW FPGA, giving users the ability to reconfigure the FPGA using a graphical programming language.  The connector also provides a VBAT line to power the Real-Time Clock chip with a battery on a RIO Mezzanine Card.  When VBAT is implemented on RIO Mezzanine Cards connected to NI Single-Board RIO, the Real-Time Clock chip allows users to keep track of absolute time in applications even in the event of power loss.  There are two main voltage pins used to power a RIO Mezzanine Card.  The 5V rail is the main rail used to provide power to the RIO Mezzanine Card while the FPGA_VIO lines are used to supply I/O power and determine I/O levels for the FPGA I/O pins.  Figure 2 shows the connector pinout.

Figure 2. Pin Listing of RIO Mezzanine Card Connector.

Additional processor functionality, such as RS232/485 and CAN, may also be exposed through the RIO Mezzanine Card connector.  For further information on additional processor I/O, contact your local National Instruments sales engineer.

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3. Next Steps

Learn more about NI Single-Board RIO

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