PCI Express Clock Specifications and Effect on NI PXIe-PCIe8375 Interoperability

Publish Date: Nov 20, 2009 | 3 Ratings | 3.67 out of 5 |  PDF

Overview

National Instruments strives to provide quality products and ensure compatibility and flexibility for end users. To achieve this goal, National Instruments participates in industry standard technology development groups and develops products adhering to industry standards, where these standards exist, to ensure interoperability with other products. NI products interact appropriately with components from other companies that are designed to industry standards. Examples of this include NI products based on GPIB, VXI, PCI, PCI Express, USB, PXI, and PXI Express. The NI PCIe-8375 and NI PXIe-8375 implement a fiber-optic PCI Express x4 link between a host computer and a PXI Express chassis. The NI PCIe-8375 and NI PXIe-8375 are designed to follow the PCI Express and PXI Express standards, respectively. To ensure interoperability, these standards specify parameters such as voltage levels, signal encoding, bit rate, packet size, error detection mechanisms, and timing. A 100 MHz reference clock, provided by the host computer, is specified with detailed timing characteristics to serve as a timing reference for device communication. Peripheral cards and adapters, including graphics cards, network and storage adapters, communication devices, FPGAs, and instrumentation cards that are designed to the specification can communicate with the host PC if the host also complies with the specification. Unfortunately, during interoperability testing on the NI PXIe-PCIe8375 devices, many PCs violated the specifications for the 100MHz reference clock. This paper will describe the background of the problem and provide recommendations on PCs to use with the NI PXIe-PCIe8375.

Table of Contents

  1. Spread-Spectrum Clocking
  2. Clocking for the NI PXIe-PCIe8375 Devices 
  3. Recommendations for Maximum Interoperability
  4. References

1. Spread-Spectrum Clocking

Developers of the PCI Express Specification realized that a constant-frequency 100 MHz clock may present a problem with radiated emissions standards. These emissions standards were developed to minimize the chance of devices interfering with each other. For example, a PC with a constant 100 MHz clock may generate emissions that interfere with your FM radio or instrumentation. To aid systems in complying with these emissions regulations, the reference clocks of the PCI Express system are frequency-modulated. Modulation reduces the peak energy in clocking signals and spreads it across several adjacent frequencies, reducing the chance of interfering with other devices. Clocks with this type of frequency modulation are known as spread-spectrum clocks. 

This reference clock frequency modulation impacts system timing; however, PC technology specifications are designed with these timing impacts in mind. The modulation behavior is defined by various parameters so that designers know what operational characteristics are required by their components. The modulation is specified by Chapter 4 of the PCI Express Specification. It specifies a modulation rate of 30 kHz to 33 kHz and a modulation amplitude of 0% to –0.5%. This means the clock, and data based on the clock frequency, can be down-spread by one-half percent from the nominal clock frequency (100 MHz) and change at a rate not to exceed 33 kHz.

Figure 1 shows the modulated clock frequency of the PCI Express clocks of several systems over approximately 90 μs. The vertical scale is the frequency of an individual clock period and the horizontal scale is the time in seconds. The 90 μs capture on this plot illustrates almost 3 full cycles of the clock modulation. All of the clocks comply with the maximum 33 kHz modulation rate.

The blue trace shown in Figure 1 depicts a PCI Express reference clock that is properly modulated: the frequency of the modulation is between 30 kHz and 33 kHz, the amplitude of the modulation is 0.5% of 100 MHz (500 kHz) and it is down-spread (the maximum frequency is 100 MHz). If PCs violate this clock specification, then add-in cards designed to work with the specification cannot guarantee complete functionality. 

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2. Clocking for the NI PXIe-PCIe8375 Devices 

The NI PCIe-8375 and NI PXIe-8375 implement a fiber-optic link between a host PC and a PXI Express chassis. These cards have interfaces to both the PC, through the PCI Express slot, and the PXI Express chassis, through the controller slot. These interfaces are governed by both the PCI Express 1.1 and 2.0 specifications and the PXI Express Hardware
Specification. The NI PCIe-8375 is specifically designed to adhere to the PCI Express Base Specification that governs the devices and the PCI Express Card Electro-Mechanical Specification that governs the add-in card form factor including interface requirements. 

During development of the NI PCIe-8375, National Instruments discovered that several systems used to test performance and interoperability do not follow the specifications for the reference clock as set forth in section 4.3 of the PCI Express Specification. These clocks failed in different ways. Figure 1 below shows the measured clock data from four different systems. Some were center-spread (modulated +0.25% and –0.25%) instead of down-spread, as shown by the red trace in Figure 1. This creates an over-clocked condition because 50% of the time the clock is faster than the specification allows. Other systems modulated their clocks by almost 1% instead of 0.5%, or twice the amplitude allowed by the specification (as shown by the brown trace in Figure 1). Another example of a specification violation is the green trace in Figure 1, which shows a constant-frequency 100.1 MHz clock, violating the 100 MHz maximum frequency limit.

Figure 1. Clock Frequency Over Time

Figure 1 depicts:

  • Blue trace: Ideal PCI Express spread-spectrum clock. The modulation frequency is between 30 kHz and 33 kHz, the modulation amplitude is 0.5% and it is down-spread (frequency is never over 100 MHz).
  • Red trace: 0.5% center-spread PCI Express clock. This clock violates the PCI Express Specification because it is center-spread instead of down-spread. The amplitude of the modulation is 0.5%, but since it is center-spread, the clock frequency peaks as high as 100.2 MHz, violating the 100 MHz maximum frequency limit.
  • Brown trace: 1% center-spread PCI Express clock. This clock violates the PCI Express Specification in two ways:
    – It is spread almost 1% instead of 0.5%, and
    – It is center-spread instead of down-spread. This means the frequency of this clock peaks almost as high as 100.5 MHz.
  • Green trace: Constant-frequency 100.1 MHz PCI Express clock. This clock violates the PCI Express Specification because its frequency is over the maximum limit of 100 MHz. The PCI Express Specification allows clocks to have a constant-frequency (non spread-spectrum), but the frequency must be 100 MHz.
  • Pink markers: 300 ppm tolerance around 100 MHz allowed by the PCI Express Specification. Clock frequency must not exceed the top pink marker. 
  • Orange marker: 0.5% down-spread from 100 MHz (100 MHz–0.5% = 99.5 MHz). Clock frequency must not dip below the orange marker.

    The NI PCIe-8375 expects the host PC to provide a compliant clock for proper operation. The systems providing the green, brown, and red data sets violate the clocking parameters and therefore the NI PCIe-8375 may not operate properly.

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3. Recommendations for Maximum Interoperability

In a survey of commercially available desktop computers conducted by National Instruments when this white paper was written, we found that up to a third of these systems had clocks that did not comply with the PCI Express Specification.
It should be mentioned that two of the non-compliant systems had the ability in the BIOS to disable spread-spectrum modulation, and when this was done the clock became compliant with the specification. The second observation is that several vendors provide a product portfolio that contains both compliant and non-compliant systems. Therefore, a
vendor cannot be said to always break the specification and cause compatibility problems. This creates confusion in the marketplace for end users and difficulty for add-in card suppliers.

Large IT suppliers, such as Dell and Hewlett Packard, strive for the greatest compatibility by strictly designing their systems to meet specification requirements. Similarly, NI embedded controllers and rack-mount controllers are designed to meet specifications as well. To ensure compatibility with the NI PXIe-PCIe8375 Fiber-Optic MXI-Express solution, or any other PCI Express peripheral, NI recommends buying systems from these vendors.

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4. References

  1. PCI Express Base Specification 1.1, PCI Special Interest Group, www.pcisig.org
  2. PCI Express Electro-Mechanical Specification 1.1, PCI Special Interest Group, www.pcisig.org
  3. Using CDC590A/2510A PLL with Spread Spectrum Clocking (SSC) Application Note, Texas Instruments, http://focus.ti.com/lit/an/scaa039/scaa039.pdf
  4. Spread Spectrum Technologies, Cypress Semiconductor, Sp http://www.cypress.com/?id=1215

 

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