Teach Digital Concepts with the PLD Schematic in NI Multisim

Publish Date: Jan 08, 2010 | 2 Ratings | 4.50 out of 5 |  PDF

Overview

Engage students and reinforce theory with a hands-on approach by helping students make the connection between digital theory and hardware implementation through the generation of raw VHDL from NI Multisim software. With the new programmable logic device (PLD) schematic, students can capture and simulate a digital circuit in Multisim and then export to a VHDL file that can be used to target PLD hardware. This continued integration of Multisim simulation with real-world signals eases the transition from theoretical concepts to implementation.

This application paper takes a closer look at the PLD schematic and components and shows how you can reinforce digital circuit concepts with Multisim and the NI Digital Electronic FPGA Board.

Table of Contents

  1. Programmable Logic Designs in Multisim
  2. PLD Components
  3. PLD Port Connectors
  4. Start with the PLD Wizard and Finish with Export to VHDL
  5. Additional Resources

1. Programmable Logic Designs in Multisim

Inside NI Multisim software, you can graphically define the internal structure of a programmable logic device (PLD) using specialized PLD components in the PLD schematic. You can then export the circuit captured and simulated inside the PLD schematic to a VHDL file for use with hardware to prototype a design. 

This removes redundancies by streamlining the design and implementation process. Traditionally a digital circuit taught in the classroom was captured and simulated inside a circuit teaching environment like Multisim. A student explored digital concepts by interacting with the circuit, perhaps with simulation-driven instruments such as a digital reader/writer or logic analyzer. Once they verified the behavior of the circuit and prepared to test it in hardware, students often stopped to learn VHDL before they moved to a different software package to target hardware.

With the PLD schematic, NI abstracts the complexity of VHDL by fostering student exploration of digital concepts with the intuitive capture and simulation of Multisim. Students can take a digital design and generate the VHDL directly.

The PLD schematic:

  • Restricts the components that you can place to those that can be mapped for VHDL export and to special diagnostic components
  • Features special port connectors that map the external nets to internal signals and identify the signal modes
  • Enables export to VHDL

Learn more about each of these elements later in the document.

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2. PLD Components

In addition to a specialized schematic, Multisim contains dedicated components that define the operation of the individual logic blocks of the PLD. These include logic gates, buffers, adders, comparators, decoders and encoders, multiplexers and demultiplexers, generators, latches, flip-flops, counters, and shift registers. With a combination of these basic building blocks, students can build a variety of digital circuits.

Each PLD component contains two different parts: a SPICE model and VHDL export data. With the SPICE model, you can simulate the components in Multisim. The VHDL data contains the properties and the settings that create the VHDL file and package as you export the PLD to VHDL. You can edit the VHDL data of the components if you want to customize a component.

PLD components are located in the PLD Logic Group and Source Group of the Multisim component database. You can also access the PLD components from the PLD Component Toolbar (as seen below).

Refer to the user manual for details on how to add PLD components to the PLD schematic.

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3. PLD Port Connectors

PLD port connectors are the field-programmable gate array (FPGA) pins that the PLD circuit uses. This is important because as you start designs, you want to keep in mind the VHDL signal names that you plan to map to these pin connectors.

You can set a connector to input, output, or bidirectional mode. The mode defines the behaviors in simulation and VHDL export. Input and output modes allow input and output to the PLD, respectively. The bidirectional mode may act as either an input or output, depending on the state of the control pin. When the signal on the control pin is high, the connector acts as an output from the PLD. When the signal on the control pin is low, the connector acts as an input to the PLD.

A connector’s symbol changes based on its mode: input (1), output (2), and bidirectional (3).

To learn how to place port connectors on your PLD schematic, refer to the Multisim Help file.

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4. Start with the PLD Wizard and Finish with Export to VHDL

Now that you have examined the different parts of the PLD, you can begin creating your first PLD schematic. 

The PLD Wizard guides you through the steps of creating and configuring the PLD schematic as an independent design, a subcircuit in a larger PLD, or a hierarchical block in a standard schematic.

With the PLD Wizard, you can select the configuration file, which is used to describe the general properties of the PLD and define the connectors that appear in the PLD schematic. Your selection of the configuration file depends on the hardware you plan to use to export VHDL code from Multisim. Continue through the rest of the wizard to name and select connection ports and settings and finish with a PLD schematic including port connectors to begin building your digital design.

When you have completed the design and verified the circuit behavior through simulation, you are ready to export to VHDL. Select Transfer»Export PLD to VHDL to run a Topology Check and display the Export PLD to VHDL dialog box. Multisim exports two VHDL files. The design file defines the top level of the design and contains the topology of the PLD schematic. The second is the package file that contains the definitions of all the components in the PLD schematic. You can move these two files into industry-standard software like Xilinx ISE to target hardware like the NI Digital Electronics FPGA Board, which features a Xilinx Spartan 3E FPGA.

You have just walked through the different parts of the PLD schematic capture and learned about the PLD Wizard and how to export to VHDL. For more details, refer to the Multisim Help file.

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5. Additional Resources

 

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