Hardware Requirements
- PXI(e) chassis with external clocking
- PXI(e) controller
- PXI(e) DAQ module
- PXI-668x timing and synchronization module
- Any FieldDAQ device, cDAQ-9185, or cDAQ-9189
Software Requirements
- NI-DAQmx 18.1 or later
- NI-TimeSync 18.1 or later
- NI-Sync 18.1 or later
- LabVIEW 2015 or later
Note: As of NI-Sync 19.0, the NI-TimeSync and NI-Sync drivers have merged. Please refer to NI-Sync driver documentation for installation instructions and usage.
Hardware Setup
Connect the FieldDAQ or cDAQ chassis to the ethernet port on the PXI-668x module. The system can be expanded to multiple FieldDAQ or cDAQ devices in a line configuration by daisy-chaining or in a star configuration via an external 1588-capable switch.
If you are using a PXIe chassis, the PXI-668x cannot be used in the chassis's timing slot. In order to drive the chassis' reference clock, connect a BNC cable from CLK OUT on the PXI-668x to 10MHz REF IN on the back of the PXIe chassis. If you are using a PXI chassis, the PXI-668x module can be used in the chassis' timing slot and an external cable is not required.
Synchronization Procedure
Configuring the FieldDAQ or cDAQ Chassis
To synchronize with a PXI system, the FieldDAQ or cDAQ device must first be configured to use IEEE 1588 PTP instead of the default standard, IEEE 802.1AS. Initialize an NI-Sync session to the FieldDAQ or cDAQ device, disable the IEEE 802.1AS time reference, and enable the 1588 time reference. Reference Figure 1 and the attached VI for an example of this method. This can also be accomplished with the Enable and Disable Time References.vi example found in the LabVIEW Example Finder.
If the FieldDAQ or cDAQ device cannot initially be found using this example, modify the NI-Sync Resource control to insert .local following the device hostname. For example, sync://cDAQ9185-ABC1234/system would change to sync://cDAQ9185-ABC1234.local/system.
Figure 1. Configure FieldDAQ or cDAQ 1588 Time Reference
Configuring the PXI System
Next, set the PXI-668x to 1588 mode and drive the chassis' CLK10 timebase from the PXI-668x's clock.
See Figure 2 for an example of disciplining the PXI timebase. If the PXI-668x is used in a PXI chassis, the timing slot can be used and the System Timing Slot? boolean control can be set to TRUE. If the PXI-668x is used in a PXIe chassis the timing slot cannot be used, and the card's CLK OUT connector should be routed to the chassis's 10MHz REF IN connector. In this case, the System Timing Slot? boolean control should be set to FALSE.
Figure 2. Discipline PXI_Clk10 to Time Reference
Triggering Synchronized Acquisition
While FieldDAQ and cDAQ devices support DAQmx time-based start triggers, PXI(e) DAQ modules do not. To approximate a time-based start trigger for PXI(e) DAQ tasks, first set a Future Time Event on the PXI-668x. Then, use that event as a digital edge start trigger for the PXI(e) DAQ task. See Figure 3 and the attached VI for an example of this method.
Figure 3. Initialize and run time-synchronized DAQmx tasks
Synchronization Considerations
When successfully synchronized, the PXI(e) DAQ module and FieldDAQ or cDAQ device will maintain frequency aligned measurements. However, the phase will be offset by a static value. This will depend on a number of factors, including things like cable length mismatch, impedance mismatch, and PXI trigger delays. This static delay will be unique to each system and may require measurement and characterization in order to compensate for the start time offset.
When building a waveform from data acquired on a PXI(e) DAQ card, the start time of the waveform (t0) will be determined by the time at which the samples are acquired in LabVIEW. The start time will be slightly delayed from the time data was captured by hardware. This behavior applies only to PXI(e) devices and not FieldDAQ or cDAQ devices, which will return hardware-based timestamps. The delay can be corrected by using the time set as the start time trigger for the waveform t0 value, as shown in Figure 3.